SHF: Small: Next-Generation Fully Integrated Power Management Circuits: Enabling Faster and More Efficient Computing and Communication in Smaller and Lower-Cost Mobile Electronics

随着下一代系统芯片（soc）和5G新无线电在更薄、更小、更低成本的设备上的应用，半导体行业对更快、更高效的计算和通信的需求越来越大。现有的电源管理集成电路（Power Management Integrated Circuits, pmic）作为为系统各部件提供电源的关键器件，已不能满足未来应用的需求，在速度、外形和成本等方面成为系统发展的最大瓶颈。该项目旨在开发新的高频稳压器设计，将所有组件（包括功率电感和电容器）完全集成在集成电路封装中。动态速度将得到提高，以实现soc的最佳节能策略，这对于放松功率和热限制以获得更高性能至关重要。提高的速度将使高带宽包络跟踪技术成为可能，这将大大降低在高速通信系统中提供射频功率放大器的功率开销，并提高整体效率。外形尺寸和成本将大大降低。此外，由于电源是任何电子设备的基础，该项目将潜在地受益于广泛的科学，工业和医疗应用。此外，研究、教育和外展活动也将有助于培养未来的科学和工程劳动力，扩大STEM领域的参与。为了实现研究目标，本项目将开发具有多种创新的完全集成稳压器，例如：1)新型功率电感器：开发具有封装内寄生的近自由和高质量功率电感器，使其能够自由地扩展相数，以实现更快的速度，更高的功率容量和更好的效率，而不增加外形因素和成本；2)新的拓扑和设计策略：a)开发最大效率跟踪策略，以确定设计阶段和运行阶段的最佳阶段数；B)开发多级拓扑，用于直接从电池到负载的一级电压转换；3)新的控制器和电路：a)通过开发自学习补偿器，将小信号带宽推向理论极限；B)通过开发智能混合阵列和突发模式操作来最大化大信号速度；C)设计控制和电路技术，以最优效率切换多相和多级功率级；D)为堆叠和多级拓扑结构开发动态电压应力管理，以支持宽电压范围，并确保在高频和大电流操作下的可靠性。这些设计将在硅上实现，并通过详细的性能表征进行测量。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

The semiconductor industry has increasing demands for faster and more efficient computing and communication with next-generation System-on-Chips (SoCs) and 5G new radios in thinner, smaller and lower-cost devices. The existing Power Management Integrated Circuits (PMICs), which are essential to supply power to different system components, cannot keep up with the needs of future applications, and become the most significant bottleneck in system development in respect of speed, form-factor and cost. This project aims to develop new designs of high-frequency voltage regulators fully integrated with all the components, including power inductors and capacitors, embedded in the integrated circuit package. The dynamic speed will be enhanced to enable optimal power-saving strategies for SoCs, which are essential to relax power and thermal constraints for higher performance. The enhanced speed will enable high-bandwidth envelop-tracking techniques, which will greatly reduce the power overhead in supplying radio-frequency power amplifiers in high-speed communication systems and improve the overall efficiency. The form factor and cost will be dramatically reduced. Besides, since power supply is fundamental in any electronic device, this project will potentially benefit a wide range of scientific, industrial, and medical applications. In addition, the research, education and outreach activities will also contribute to training the future science and engineering workforce and broadening participation in STEM areas.To accomplish the research goal, this project will develop fully integrated voltage regulators with multiple innovations, e.g., 1) new power inductors: develop near-free and high-quality power inductors with in-package parasitics to enable the freedom to expand the number of phases for faster speed, higher power capacity and better efficiency without increasing the form-factor and cost; 2) new topologies and design strategies: a) develop maximum efficiency-tracking strategies to determine the optimal number of phases at the design stage, as well as in operation; b) develop multi-level topologies for one-stage voltage conversion directly from the battery to the load; 3) new controller and circuits: a) push the small-signal bandwidth to the theoretical limit by developing a self-learning compensator; b) maximize the large-signal speed by developing a smart hybrid array and a burst-mode operation; c) design control and circuit techniques to switch the multi-phase and multi-level power stages with optimal efficiency; d) develop dynamic voltage stress management for stacking and multi-level topologies to support a wide voltage range with ensured reliability under high-frequency and high-current operations. The designs will be realized in silicon and measured with detailed performance characterizations.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.