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SBIR Phase I: Reduced Instruction Set Computer-V (RISC-V) Unikernels

SBIR Phase I: Reduced Instruction Set Computer-V (RISC-V) Unikernels
SBIR 第一阶段:精简指令集计算机-V (RISC-V) Unikernels
批准号:
2103506
负责人:
Ian Eyberg
金额:
$23.15万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2021
资助国家:
美国
项目状态:
已结题
起止时间:
2021-11-01 至 2022-08-31

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英文摘要
The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase 1 project focuses on the development of a more secure computer infrastructure in the US, particularly for building automation systems, power systems, etc. Much of the current infrastructure runs on older computer architectures and the hardware suffers from a number of vulnerabilities that cannot be fixed by upgrading the software. This project seeks to allow ventors to find and fix hardware vulnerabilities more quickly and without constraints from intellectual property holders. The project will allow un-modified Linux binaries to run as unikernels on the reduced instruction set of reduced instruction set computer-V (RISC-V) architecture. The RISC-V architecture is an open ISA (instruction set architecture) and allows for rapid innovation and broad adoption in the expanding edge and IoT (internet of things) space. Being able to deploy applications to RISC-V as unikernels versus ordinary Linux guests brings strong security, performance, and deployment benefits to the ecosystem.This Small Business Innovation Research (SBIR) Phase 1 project directly addresses performance, security, and deployment problems current edge and IoT projects. Current edge-based systems use operating systems that are multi-decades old, are hard to upgrade, and are targeted in cyberattacks worldwide. To enable advanced technology that requires edge compute such as machine learning applications to be safely deployed, the security concerns of the underlying operating system must be addressed. Unikernels are single process systems that can run programs on the same virtual machines with a heavily reduced attack surface. By applying unikernel technology to the RISC-V architecture, advanced technology can be more quickly deployed in a safer manner.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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