SaTC: CORE: Small: Generic Circuit Learning from Adaptive Side-Channel Queries

SaTC：核心：小型：从自适应侧通道查询中学习通用电路

• 批准号: 2155189
• 负责人: Kaveh Shamsi
• 金额: $ 36.59万
• 依托单位: University of Texas at Dallas
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2022
• 资助国家: 美国
• 起止时间: 2022-07-01 至 2025-06-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2155189&HistoricalAwards=false
• 关键词: SaTC; CORE; Small; Generic; Circuit

This project aims to develop algorithms and techniques for allowing one to learn the hidden structure of a digital or analog circuit from power, timing, and electro-magnetic radiation measurements (so-called side-channels) of the circuit, in a generic (applicable to arbitrary circuits) and adaptive (the algorithm intelligently interacts with the circuit) manner. Such algorithms can be used in various applications most importantly as tools in the arsenal of hardware security and integrity checking. Given the rise in cyber threats especially those that involve hardware access to such versatile adaptive tools become increasingly valuable. The project aims to deliver the developed technology in the form of (open-source) software, benchmarks, papers, machine-learning datasets, and training of an expert future workforce.The project explores this problem along three technical tasks: The first task is dedicated to digital circuits with a focus on solver-based, circuit-based, and statistical/machine-learning-based solutions. The second task is dedicated to analog and mixed-signal circuits. This involves exploring how to model arbitrary analog circuit side-channels and having non-linear solvers and optimizers interact with them for the learning process. The third task is dedicated to utilization, evaluation, and demonstration. This involves taking results from the first two tasks and using them in the context of security analysis of various circuit protection schemes against side-channel attacks, and the detection of malicious hardware modifications. Simulation in software, programmable hardware, discrete components, plus two chip designs are being used to test the proposed methods and algorithms as well.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

该项目旨在开发算法和技术，以通用（适用于任意电路）和自适应（算法智能地与电路交互）的方式，允许人们从电路的功率，时序和电磁辐射测量（所谓的侧通道）中学习数字或模拟电路的隐藏结构。 这些算法可以用于各种应用程序中，最重要的是作为硬件安全和完整性检查的工具。鉴于网络威胁的增加，特别是那些涉及硬件的威胁，获得这种多功能的自适应工具变得越来越有价值。该项目旨在以（开源）软件、基准测试、论文、机器学习数据集和培训未来的专家队伍的形式提供所开发的技术。该项目沿着三项技术任务来探讨这一问题：第一项任务致力于数字电路，重点是基于求解器、基于电路和基于统计/机器学习的解决方案。第二个任务是专门用于模拟和混合信号电路。这涉及探索如何对任意模拟电路侧通道进行建模，以及让非线性求解器和优化器与它们交互以进行学习过程。第三项任务是致力于利用、评估和示范。这涉及获取前两项任务的结果，并将其用于针对侧通道攻击的各种电路保护方案的安全分析以及恶意硬件修改的检测。该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。