CAREER: Unary Computing in Memory for Fast, Robust and Energy-Efficient Processing

职业:内存中的一元计算,实现快速、稳健和节能的处理

基本信息

  • 批准号:
    2339701
  • 负责人:
  • 金额:
    $ 60万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Continuing Grant
  • 财政年份:
    2024
  • 资助国家:
    美国
  • 起止时间:
    2024-03-01 至 2029-02-28
  • 项目状态:
    未结题

项目摘要

Transferring data between memory and processing units in conventional computing systems is expensive in terms of energy and latency. This data movement consumes significant energy and slows down the processing speed, particularly for data-driven applications such as machine learning workloads. In-memory computing (IMC) is a promising solution to address this issue by performing computations inside memory. However, IMC techniques using emerging memory technologies suffer from multiple key technical challenges that limit their applicability in today’s computing systems. Significant error in the computations is likely with these IMC techniques. The processing latency also increases significantly with data-width; e.g., this is approximately an exponential increase for the multiplication operation. This project addresses the critical challenges with today’s IMC techniques by exploiting a simple and uniform representation of data. Complex arithmetic operations on weighted binary data are transformed into simple bit-wise memory-friendly operations on uniform bit-streams. Successful completion of the project will accelerate and reduce the power and energy consumption of a wide range of applications from biomedicine (e.g., retinal implants), to security (e.g., miniaturized unmanned aerial vehicles), to smart sensors and machine learning (e.g., speech recognition). The team will share the project outcomes, including articles, simulators, and hardware and software toolkits, with the research community. The findings and technical outputs will be integrated into instructional materials for graduate, undergraduate, and K-12 classroom settings. The project activities will engage active participation of graduate and undergraduate students from underrepresented groups.This project combines the complementary properties of two emerging technologies, IMC and unary computing (UC), to implement a high-performance, reliable, and energy-efficient data processing platform with high computational ability. The presented platform addresses the technical challenges of the IMC techniques using emerging memory technologies. It also addresses the latency and cost-efficiency of the existing UC designs with combinational CMOS logic. The technology explored in this project aims to improve the robustness of IMC operations to noise and variation by processing uniform bit-streams. The platform is highly parallel and effectively scales with the size of computations. It enables fast, accurate, and simple execution of a wide range of arithmetic operations entirely in memory. It enjoys independent bit-wise operations, avoiding long chains of operations, an important source of in-efficiency in today’s IMC techniques. The target platform is general and can be used for various applications.This project is jointly funded by the Software and Hardware Foundations (SHF) program in the Computing and Communication Foundations (CCF) division, and the Established Program to Stimulate Competitive Research (EPSCoR).This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
在常规计算系统中的存储器和处理单元之间传输数据在能量和延迟方面是昂贵的。这种数据移动会消耗大量的能量,并降低处理速度,特别是对于数据驱动的应用程序,如机器学习工作负载。内存计算(IMC)是一个很有前途的解决方案,以解决这个问题,在内存内执行计算。然而,使用新兴存储器技术的IMC技术遭受多个关键技术挑战,这限制了它们在当今计算系统中的适用性。使用这些IMC技术可能会在计算中出现重大错误。处理延迟也随着数据宽度而显著增加;例如,对于乘法运算来说,这大约是指数增长。该项目通过利用简单而统一的数据表示来解决当今IMC技术的关键挑战。加权二进制数据上的复杂算术运算被转换为均匀位流上的简单逐位内存友好运算。该项目的成功完成将加速和减少生物医学广泛应用的功耗和能源消耗(例如,视网膜植入物),安全性(例如,小型化无人机),智能传感器和机器学习(例如,语音识别)。该团队将与研究社区分享项目成果,包括文章,模拟器以及硬件和软件工具包。研究结果和技术成果将被整合到研究生,本科和K-12课堂设置的教学材料中。该项目活动将吸引来自代表性不足群体的研究生和本科生的积极参与。该项目结合了IMC和一元计算(UC)这两种新兴技术的互补特性,实现了一个高性能、可靠和节能的数据处理平台,具有高计算能力。所提出的平台解决了使用新兴存储器技术的IMC技术的技术挑战。它还解决了现有的UC设计与组合CMOS逻辑的延迟和成本效益。本项目中探索的技术旨在通过处理均匀的比特流来提高IMC操作对噪声和变化的鲁棒性。该平台是高度并行的,并有效地与计算的大小进行缩放。它可以完全在内存中快速、准确、简单地执行各种算术运算。它享有独立的逐位操作,避免了长链的操作,这是当今IMC技术效率低下的重要原因。目标平台是通用的,可用于各种应用。本项目由计算和通信基金会(CCF)部门的软件和硬件基金会(SHF)计划共同资助,以及刺激竞争研究的既定计划(EPSCoR)该奖项反映了NSF的法定使命,并通过使用基金会的知识价值和更广泛的影响进行评估,被认为值得支持审查标准。

项目成果

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