Combinational logic based on chemically designed cluster-ligand systems with electrical addressing of quantum states

我们建议利用自组装交换耦合的几个纳米点阵列的电子量子态来开发原型组合逻辑机器。小的核心Au团簇将被适当的配体功能化。纳米电极将对通过组装几个点形成的阵列的状态进行电子寻址。理论将考虑电荷转移的库仑阻塞、无序的不同方面和配体的作用来确定可能的状态。该设计寻求超越开关阵列，并直接集成用于在几点阵列上实现逻辑门的布尔运算，例如半加法器和全加法器。我们的目标是制作一个在室温下工作的这种逻辑门的演示器，进行电子输运研究，验证计算结果，并用理论来进一步优化性能。为此，将合成核心尺寸小于2 nm的功能性Au团簇。这些将通过在光刻预定义的和在第二阶段中定制的纳米电极之间的定向自组装工艺来布置，以便制造多个终端设备。利用这种方法，将展示用于硬件级别的信息处理设备的纳米级集成。更长期的目标是将设计的能力扩展到有限状态逻辑机的能力。

We propose to develop prototypical combinational logic machines using electronic quantum states of self-assembled exchange-coupled few nanodot arrays. Small core Au clusters will be functionalized with suitable ligands. Nanoelectrodes will electrically address the states of the array formed by assembling a few dots. Theory will determine the possible states taking into account the Coulomb blocking of charge transfer, the different aspects of disorder and the role of the ligands. The design seeks to go beyond switching arrays and to integrate directly Boolean operations for the implementation of logic gates, such as half- and full-adders, on a few-dot array. We aim to fabricate a demonstrator of such logic gates working at room temperature, to perform electron transport studies, to verify the computational results, and to use theory to further optimize the performance. For this, functional Au clusters with well-defined core-sizes of less than 2 nm will be synthesized. These will be arranged by directed self-assembly processes between lithographically predefined and, in a second stage, tailored nanoelectrodes in order to fabricate multiple terminal devices. Using this approach nanometer scale integration of devices for information processing at the hardware level will be demonstrated. A longer-term goal is to extend the capability of the design to that of a finite state logic machine.