Optimum Capacitor Switching Algorithms For Successive Approximation Register (SAR) Analogue-to-Digital Converters (ADC)

用于中速和中分辨率应用的模数转换(ADC)通常由电容式逐次逼近寄存器(SAR)模数转换器执行。它们使用三个核心功能：充电电容器、电荷再分配和电压比较。它们中的每一个都消耗电池电力或燃烧电力。电荷再分配DAC及其控制逻辑是总功耗的主要组成部分。根据电源波形的不同，使用电压源对电容器进行充电可以节省潜在的电能。在本项目中，我们将优化的波形设计和新的开关方案相结合，以实现最小的功耗。对于实际可实现的开关方案，还考虑了微电子实现的约束，例如来自版图的寄生。为了比较不同的解决方案，将定义一个新的开关方案的品质因数(FOM)，以涵盖能量消耗、线性度和速度。硅片的概念验证结束了该项目，并将展示所实现的能源节约。

Analogue-to-digital conversion (ADC) for medium speed and medium resolution applications is often performed by capacitively successive approximation register (SAR) analogue-to-digital converters. They employ three core functions: charging capacitors, charge redistribution and voltage comparison. Each of them consumes battery power or burns power. The charge redistribution DAC, together with its control logic, is a major part of the total power consumption. Charging capacitors from a voltage source offers potential power savings depending on the wave form of the power source. In this project we combine optimum wave form design and new switching schemes to achieve minimal power consumption. Microelectronic implementation constraints, e.g. parasitics from layout are also taken into account for practically realizable switching schemes.For comparison of different solutions a new figure of merit (FoM) for the switching schemes will be defined to cover energy consumption, linearity and speed. A proof of concept in silicon concludes the project and will demonstrate the achieved energy savings.