Design and Optimization of Non-Volatile One-Memory Architecture (NVM-OMA)

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Continuous development in the area of non-volatile memory (NVM) brings concrete system setups closer to reality and enables a concrete view and investigation of systems and system properties with NVM main memory. While we successfully studied the unified usage of NVM as main memory and storage memory in the first phase of this project, we have noticed that it is crucial to handle the heterogeneity of arising NVM systems properly and in a structured way.Thus, we will specifically study the construction of one memory architecture (OMA) under the aspect of providing a structured and unified way of management for modern NVM equipped systems in the second phase of this project. The OMA abstraction should cover not only performance but also non-functional properties like volatility, data retention, reliability (wear-leveling), etc. Furthermore, OMA should provide a unified abstraction to handle the heterogeneity of memory usage in the system software. Besides considering hardware heterogeneity, we will put a major focus on the heterogeneity of the memory usage of software. The typical memory segmentation with heap, stack, data and text results in heterogeneous access behavior of memory areas, i.e., the text segment is read only, whilst a specific memory region in the stack can result in frequent write accesses. Our objective is to explicitly consider such heterogeneity as part of OMA.The project is coupled by two principle investigators (PI) from TU Dortmund and KIT in Germany and three PIs from Academia Sinica, National Taiwan University, and Chang Gung University in Taiwan. The applicant groups are domain experts in hardware-software codesign, embedded systems, non-volatile memories, power-efficient designs, emerging technologies, and real-time systems. We will move forward with unconventional approaches to alter the classic way of memory usage in order to be more NVM-friendly. Within this second phase of NVM-OMA, the project intends to provide novel solutions for properties, which have been widely neglected so far. Overall, this project phase will take heterogeneous NVM systems as a basic system for all developed methods. We plan to make all methods and solutions adaptive to various NVM types, granularities, and levels within the memory hierarchy. Furthermore, we will explore the design space and develop methods and insights on how to decide for the right NVM type to be adopted. In combination with our adaptive management strategies, this ultimately allows the construction of one memory architecture.