Universal Memcomputing in Hardware Realizations of Memristor Cellular Nonlinear Networks

在Mem2CNN第二阶段，我们打算将忆阻器器件及其独特的特性扩展到记忆细胞神经网络(M-CNN)中，而不仅仅是它们目前仅在细胞状态组件中的应用。拟议项目的最终目标是探索和实现具有存储可编程性的通用非冯·诺伊曼计算体系结构的新硬件，以实现M-CNN万能机(M-CNNum)。在所提出的系统中，将利用交叉排列的忆阻器来实现M-CNN基因家族，即所谓的染色体。在CNN理论中，染色体是以顺序方式执行以执行各种计算任务的CNN基因的集合，类似于在传统计算机系统中观察到的算法操作。忆阻器交叉开关阵列可以用作点积引擎，执行必要的乘法和累加运算来计算每个细胞的偏移量，它类似于相邻细胞的输入和输出的总贡献，以及固定的偏置，由每个基因的突触权重加权。然后，我们计划将这种新颖的基于染色体忆阻器的硬件实现与M-CNN内核的丰富动态特性相结合，以设计整个M-CNNum单元，并在所提出的硬件上演示M-CNNum指令的执行。M-CNN内核同时提供了本地非易失性存储器和内存计算能力。为了便于系统开发，必须采用混合信号设计技术，利用紧凑和节能的模拟计算核心，并在管理系统操作和数据传输的外围区域中伴随所需的数字控制电路。这种设计将能够以大规模并行的方式执行M-CNNum运算，以较低的能量预算实现高速通用计算，并且必须考虑到CMOS/忆阻器电路的所有潜在电路缺陷。此外，它需要开发创新的技术来设计新的M-CNNum微体系结构，它类似于这种新型计算机的内部设计和组织。最后但并非最不重要的一点是，我们设想建立一个软件仿真基础设施，该基础设施将准确地描述所提议的M-CNNum硬件的操作，并将用于演示所提议的M-CNNum系统在实际任务中的正确操作，例如图像处理应用。以及一个小型功能M-CNNum阵列的物理实现，以进行概念验证。综上所述，Mem2CNN第二阶段的主要目标如下：1.推导基于纵横制的M-CNNum染色体结构；2.演示M-CNNum指令在硬件上的操作；3.M-CNNum微体系结构的实现；4.所开发的M-CNNum实现的概念验证应用。

In Mem2CNN phase II, we intend to expand the incorporation of memristor devices and their unique properties into Memristive Cellular Neural Networks (M-CNNs) beyond their current application solely within the cell state component. The ultimate objective of the proposed project is to explore and implement novel hardware of a universal non-von Neumann computing architecture with stored programmability that will materialize the M-CNN Universal Machine (M-CNNUM). In the proposed system, memristor devices arranged in crossbars will be utilized to implement a M-CNN gene family, the so-called Chromosome. In CNN theory, chromosomes are collections of CNN genes that are executed in a sequential manner to carry out diverse computational tasks, akin to the algorithmic operations observed in traditional computer systems. Memristor crossbar arrays can be utilized as dot-product engines, implementing the necessary multiply-and-accumulate operations for the calculation of each cell’s offset, which resembles the aggregate contribution of neighboring cells’ input, and output, and the fixed bias, weighted by each gene’s synaptic weights. Then, we plan to combine this novel chromosome memristor-based hardware realization with the rich dynamics of the M-CNN core, which offers both local nonvolatile memory and memcomputing capabilities, to design the whole M-CNNUM cell and demonstrate the execution of M-CNNUM instructions on our proposed hardware. In order to facilitate the system development, it is essential to employ mixed-signal design techniques, exploiting the compact and energy-efficient analog computing cores, accompanied by the required digital control circuitry in the peripheral regions that are managing system’s operation and data transfer. This design, which will enable the execution of M-CNNUM operations in a massively parallel manner, achieving high speed universal computation with low energy budget requirements, has to incorporate all the potential circuit imperfections of CMOS/Memristor fabricated circuits. Additionally, it necessitates the development of innovative techniques for the design of the novel M-CNNUM microarchitecture, which resembles the internal design and organization of this novel computer. Last but not least, we envisage the establishment of a software simulation infrastructure that will accurately describe the operation of the proposed M-CNNUM hardware and will be used to demonstrate the proper operation of the proposed M-CNNUM system in real-life tasks, e.g., image processing applications. As well as a physical realization of a small-scale functional M-CNNUM array, for the proof-of-concept, is planned. Summarizing, the main objectives of Mem2CNN Phase II are the following: 1. Derive a crossbar-based M-CNNUM chromosome structure, 2. Demonstrate the operation of M-CNNUM instructions on our hardware, 3. Realization of a M-CNNUM microarchitecture, 4. Proof-of-concept application of the developed M-CNNUM implementation.