Double Relaxation Oscillation SQUID Magnetometer with Superconducting Digital Flux-Locked Loop
Double Relaxation Oscillation SQUID Magnetometer with Superconducting Digital Flux-Locked Loop
批准号:
14350177
负责人:
MYOREN Hiroaki
金额:
$5.63万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2002
资助国家:
日本
项目状态:
已结题
起止时间:
2002 至 2004
中文摘要
采用超导数字磁通锁环(FLL)电路实现了片上双弛豫振荡SQUID(DROS),实现了高灵敏度磁通传感器和SQUID放大器。本文研究了两种超导数字FLL电路:一种是由8位可逆计数器和8位R-2 R梯形D/A转换器组成,采用4JL门电路,由频率高达4GHz的两相电源驱动。另一种是由基于约瑟夫森计数器的片上FLL电路和基于SFQ逻辑门的6位增/减计数器组成,其中增/减计数器采用二进制超前进位(BCL)电路实现高速运算。采用2.5kA/cm^2 Nb/Al-AlO_x/Nb结工艺,对带有BCL电路的4JL 8位加减计数器进行了逻辑模拟,结果表明,在4GHz时钟频率下,加减计数器工作正常。我们预期采用超导数字FLL电路的DROS具有高达10-7Φ_0/s的大摆率。使用SFQ逻辑门的6位加/减计数器,逻辑模拟显示了高达33 GHz的正确加/减计数操作,我们预期采用SFQ数字FLL电路的DROS可以工作在10 GHz。
英文摘要
On-chip double relaxation oscillation SQUID(DROS) with a superconducting digital flux locked-loop(FLL) circuit is demonstrated far high sensitive magnetic flux sensor and SQUID amplifier. In this study, we examined two kinds of superconducting digital FLL circuits : one was composed of a 8-bit up/down counter and a 8-bit R-2R ladder-type D/A converter designed using 4JL-gates which are driven by a two phase power supply at a frequency up to 4GHz. The other one was composed of an on-chip FLL circuit based on a Josephson counter and a 6-bit up/down counter using SFQ logic gates.In the up/down counter, we used binary carry lookahead(BCL) circuits for high-speed operation. Logic simulations for the 4JL 8-bit up/down counter with BCL circuits showed correct up-and down-counting operation at 4GHz clock frequency assuming a 2.5kA/cm^2 Nb/Al-AlO_x/Nb junction technology. We expected that a DROS with the superconducting digital FLL circuit has large slew rate as high as 10-7Φ_0/s.Using the 6-bit up/down counter using SFQ logic gates, logic simulations showed the correct up and down counting operation up to 33GHz and we expected that a DROS with the SFQ digital FLL circuits can be operated at 10GHz.
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Myoren H. et al.: "Design of single-flux-quantum universal gates with a wide operating margin"Supercond.Sci.Technol.. 16. 1447-1451 (2003)
Myoren H. 等人:“具有宽操作裕度的单通量量子通用门的设计”Supercond.Sci.Technol.. 16. 1447-1451 (2003)
DOI:
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发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
Design of single-flux-quantum universal gates with a wide operating margin
具有较宽运行裕度的单通量量子通用门的设计
DOI:
--
发表时间:
2003
期刊:
Supercond.Sci.Technol. 16
影响因子:
--
作者:
[K.T.Liu, Y.K.Su, S.J.Chang, K.Onomitsu, Y.Horikoshi, Myoren H.et al.]
通讯作者:
Myoren H.et al.
Double Relaxation Oscillation SQUID with a 4JL On-Chip Digital Flux Locked-Loop Circuit
具有 4JL 片上数字磁通锁环电路的双弛豫振荡 SQUID
DOI:
--
发表时间:
2005
期刊:
IEEE Trans.Appl.Supercond. 15(in press)
影响因子:
--
作者:
[T.Tanaka, G.C.Montanari, R.Muelhaupt, Katsuyasu Nakano, Myoren H.et al.]
通讯作者:
Myoren H.et al.
High Reliable Fabrication Process for Superconducting Integrated Circuits with Simply Fabrication Technology of All Various Via-holes Using Photosensitive Polyimide Insulation Layers
光敏聚酰亚胺绝缘层各种过孔简单制作技术的高可靠超导集成电路制作工艺
DOI:
--
发表时间:
2005
期刊:
IEEE Trans.Appl.Supercond. 15(in press)
影响因子:
--
作者:
[M.Fujita, N.Kawamoto, M.Sasajima, Y.Horikoshi, M.Takezawa, Kikkuchi K.et al.]
通讯作者:
Kikkuchi K.et al.
Sub-micron superconducting PTLs for SFQ logic circuits
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批准号:18080002
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项目类别:Grant-in-Aid for Scientific Research on Priority Areas
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资助金额:$32.96万
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财政年份:2006
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负责人:MYOREN Hiroaki
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依托单位:
Optical Interface for Superconducting Digital Circuits using Low temperature Photon Detectors
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批准号:17360154
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$10.39万
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财政年份:2005
-
负责人:MYOREN Hiroaki
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依托单位:
Fabrication of NbTiN Tunnel Junctions for Superconducting Logic Circuits
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批准号:11650313
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.24万
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财政年份:1999
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负责人:MYOREN Hiroaki
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依托单位: