Double Relaxation Oscillation SQUID Magnetometer with Superconducting Digital Flux-Locked Loop

采用高灵敏度磁通传感器和SQUID放大器，对片上双弛豫振荡SQUID（DROS）与超导数字锁链电路进行了验证。在本研究中，我们研究了两种超导数字FLL电路：一种电路由8位上下计数器和8位R-2R梯形D/ a转换器组成，该转换器采用4jl门设计，由两相电源驱动，频率高达4GHz。另一个由基于约瑟夫森计数器的片上FLL电路和使用SFQ逻辑门的6位上行/下行计数器组成。在上行/下行计数器中，我们使用二进制进位前瞻（BCL）电路进行高速操作。采用BCL电路对4JL 8位上行/下行计数器进行逻辑仿真，结果表明，在采用2.5kA/cm^2 Nb/Al-AlO_x/Nb结技术的4GHz时钟频率下，上行和下行计数正确。我们期望使用超导数字FLL电路的DROS具有高达10-7Φ_0/s的大转换速率。使用使用SFQ逻辑门的6位上行/下行计数器，逻辑模拟显示正确的上行和下行计数操作高达33GHz，我们期望带有SFQ数字FLL电路的DROS可以在10GHz工作。

On-chip double relaxation oscillation SQUID(DROS) with a superconducting digital flux locked-loop(FLL) circuit is demonstrated far high sensitive magnetic flux sensor and SQUID amplifier. In this study, we examined two kinds of superconducting digital FLL circuits : one was composed of a 8-bit up/down counter and a 8-bit R-2R ladder-type D/A converter designed using 4JL-gates which are driven by a two phase power supply at a frequency up to 4GHz. The other one was composed of an on-chip FLL circuit based on a Josephson counter and a 6-bit up/down counter using SFQ logic gates.In the up/down counter, we used binary carry lookahead(BCL) circuits for high-speed operation. Logic simulations for the 4JL 8-bit up/down counter with BCL circuits showed correct up-and down-counting operation at 4GHz clock frequency assuming a 2.5kA/cm^2 Nb/Al-AlO_x/Nb junction technology. We expected that a DROS with the superconducting digital FLL circuit has large slew rate as high as 10-7Φ_0/s.Using the 6-bit up/down counter using SFQ logic gates, logic simulations showed the correct up and down counting operation up to 33GHz and we expected that a DROS with the SFQ digital FLL circuits can be operated at 10GHz.