DEVELOPMENT OF RF-CMOS SYSTEM FOR WIRELESS MULTI-MEDIA
DEVELOPMENT OF RF-CMOS SYSTEM FOR WIRELESS MULTI-MEDIA
批准号:
12555094
负责人:
YOKOYAMA Michio
金额:
$8.77万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2000
资助国家:
日本
项目状态:
已结题
起止时间:
2000 至 2002
中文摘要
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英文摘要
Recently, RF-CMOS circuits are being developed intensively because of their cost-effectiveness, and compatibility to widely-used digital CMOS circuits. However, RF circuit design of CMOS is similar to the conventional GaAs circuits which almost consist of n-channel devices only.In this work, complementary MOS circuits which consist of both n- and p-channel devices, i.e., the real RF-CMOS circuits, have been investigated.At first, we have designed and fabricated CMOS devices. After RF measurement, Class-B n-/p-channel CMOS push-pull amplifier has been designed and evaluated by RF simulation. It is confirmed that the efficiency of CMOS push-pull amplifier is higher than that of conventional one.Next, we have developed the silicon active inductors with smaller size and medium Q-factor. Furthermore, silicon RF switches are also developed. Both devices consist of combination of silicon MOSFETs. RF performances are analyzed by using RF simulation.On the self-aligned barrier layer, aluminum films are successfully deposited in the same process chamber without breaking the vacuum. It is found that the aluminum films are selectively deposited on the conductive barrier layer.We have found that above results show that all-silicon low-cost RF-CMOS functional circuit blocks can be designed and this leads to silicon RF programmable devices for wireless terminals.
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Y.Takahashi: "Carry Propagation Free Adder/Subtracter VLSI Using Adiabatic Dynamic CMOS Logic Circuit Technology"IEICE Trans. Foundamentals. (to appear in). (2003)
Y.Takahashi:“使用绝热动态 CMOS 逻辑电路技术的进位传播自由加法器/减法器 VLSI”IEICE Trans。
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Y.Takahashi: "Carry Propagation Free Adder/Subtracter VLSI Using Adiabatic Dynamic CMOS Logic Circuit Technology"IEICE Trans. Foundamentals. 6月号(6月掲載予定). (2003)
Y.Takahashi:“使用绝热动态 CMOS 逻辑电路技术的进位传播自由加法器/减法器 VLSI”IEICE Trans 6 月号(计划于 2003 年出版)。
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Y.Takahashi: "Carry Propagation Free Adder/Subtracter VLSI Using Adiabatic Dynamic CMOS Logic Circuit Technology"IEICE Trans.Foundamentals. 6月号(6月掲載予定). (2003)
Y.Takahashi:“使用绝热动态 CMOS 逻辑电路技术的进位传播自由加法器/减法器 VLSI”IEICE Trans.Foundamentals 六月号(预定于 6 月出版)。
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M.Yokoyama: "A Proposal of Field-Programmable RF Gate Array Devices"Proc. 2002 Int. Tech. Conf. on Circuits/Systems, Computers and Communications(ITC-CSCC 2002), July 17-19 Phuket, Thailand. 767-768 (2002)
M.Yokoyama:“现场可编程射频门阵列器件的提案”Proc。
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K.Takahashi: "Sub-One Volt DC Power Supply Expandable 4-bit Adder/Subtracter System using Adiabatic Dynamic CMOS Logic Circuit Technology"Proc. 2002 Int. Tech. Conf. on Circuits/Systems, Computers and Communications(ITC-CSCC 2002), July 17-19 Phuket, Thai
K.Takahashi:“使用绝热动态 CMOS 逻辑电路技术的亚一伏直流电源可扩展 4 位加法器/减法器系统”Proc。
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共 31 条
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批准号:23650413
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项目类别:Grant-in-Aid for Challenging Exploratory Research
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资助金额:$1.91万
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财政年份:2011
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负责人:YOKOYAMA Michio
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依托单位:
STUDY OF ULTRA-HIGH-SPEED CMOS USING FULLY SELF-ALIGNED METALLIZATION
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批准号:08455157
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$4.54万
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财政年份:1996
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负责人:YOKOYAMA Michio
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依托单位:
海外基金