A study of dynamic optimization of data acquisition system using GRID technology
A study of dynamic optimization of data acquisition system using GRID technology
批准号:
15540295
负责人:
ITOH Ryosuke
金额:
$2.37万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (C)
财政年份:
2003
资助国家:
日本
项目状态:
已结题
起止时间:
2003 至 2004
中文摘要
在传统的数据采集系统中,事件生成器和触发处理器的功能和数据流是固定的,根据加速器条件的不同,存在资源浪费或性能瓶颈的可能性。本研究的目的是通过实时监测处理器的负载和数据流的速率,动态地优化处理器的使用和数据流。在第一年,监控机制是使用由25台PC服务器通过大型GbE交换机连接的试验台系统开发的。该机制是利用Belle实验中使用的网络共享内存(NSM)实现的,并成功地使其工作。利用网格软件MICH-G2对节点间的传输速度进行了测试,结果表明节点间传输速度大于60MB/s。第二年,开发了处理器利用率和数据流的优化机制。利用…实现了处理器处理功能的动态变化更多地将处理软件模块化,并使用与数据采集框架的动态链接来替换它们。结合在每个处理节点上实现的大型环形缓冲区和套接字连接的使用,成功地在不中断数据采集的情况下改变了节点上的数据流路径和/或处理功能。作为最后一步,我们试图开发一种优化系统性能的算法,然而,我们还没有成功地开发出满足数据采集系统实际使用的机制。在数据流速率逐渐变化的过程中,观察到在某一边界处发生了数据流路径和处理软件的大规模切换,导致资源浪费。有时,在切换过程中会观察到数据采集的短暂停止。因此,我们需要继续努力,利用神经网络等新技术来改进优化算法。为监测数据流和处理器负载而开发的机制被用于Belle实验的实时重建农场,并在国际高能物理计算会议04上进行了报道。较少
英文摘要
In a conventional data acquisition system, the function and data flow of event builder and trigger processor are fixed, and there are possibilities of wasting resouces or performance bottleneck depending on the accelerator condition. The purpose of this study is to optimize the usage of the processors and the data flow dynamically by a real time monitoring of the processor load and the data flow rate. In the first year, the monitoring mechanism was developed using a test bench system consisting of 25 PC servers connected via a large GbE switch. The mechanism was realized utilizing Network Shared Memory(NSM) used for the Belle experiment and it was succeeded to make it work. The transfer speed between nodes was also measured using a GRID software called MICH-G2 and was confirmed to be more than 60MB/sec.In the second year, the development of the optimization mechanism of processor utilization and data flow was done. A dynamic change of processing function on a processor was realized by … More modularizing the processing software and replacing them using a dynamic link with the data acquisition framework. Together with a use of large ring buffers and socket connections implemented on each processing node, it was succeeded to change data flow path and/or processing function on a node without interrupting the data acquisition. As the last step, an algorithms to optimize system-wide performance was trying to be developed, however, we have not yet succeeded to develop the mechanism satisfying the real usage in the data acquisition system. A massive switch of the data flow path and processing software is observed to happen at some boundary during a gradual change in the data flow rate, resulting in a waste of resources. Sometimes a short stop of the data acquisition is observed during the switching. Therefore, we need to continue the effort to improve the optimization algorithm with some new technology like the neural-net.The mechanism developed for the monitoring of data flow and processor load was used for the real time reconstruction farm of the Belle experiment and it was reported at the international conference on Computing in High Energy Physics 04. Less
期刊论文(6)
专著(0)
科研奖励(0)
会议论文
DOI:
--
发表时间:
2004
期刊:
Proceedings of CHEP04 CD-ROM
影响因子:
--
作者:
[R.Itoh et al.]
通讯作者:
R.Itoh et al.
DOI:
--
发表时间:
2004
期刊:
Proceedings of CHEP04 (CD-ROM)
影响因子:
--
作者:
[R.Itoh et al., R.Itoh et al.]
通讯作者:
R.Itoh et al.
Study of a real time feed-back system by the pipeline distributed parallel processing
-
批准号:22540319
-
项目类别:Grant-in-Aid for Scientific Research (C)
-
资助金额:$2.75万
-
财政年份:2010
-
负责人:ITOH Ryosuke
-
依托单位:
海外基金