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Studies on Digital-Controller Configuration Design and Its Synchronization Control Using Multiple Digital Signal Processors.

数字控制器配置设计及其使用多个数字信号处理器的同步控制的研究。

基本信息

批准号：
02650304
负责人：
HANEDA Hiromasa
金额：
$ 1.47万
依托单位：
Kobe University
依托单位国家：
日本
项目类别：
Grant-in-Aid for General Scientific Research (C)
财政年份：
1990
资助国家：
日本
起止时间：
1990 至 1992
项目状态：
已结题

项目摘要

1.Modeling Multi-Processor Digital Controllers and Their Synchronization SchemeEach processor is required to observe timing constraints to avoid command signal collision and is preferred not to have idling time intervals. Appropriate models have been investigated and selected for both feedback-type and program-controlled-type controllers with an emphasis on the verification of synchronization capabilities. It was concluded that discrete-time system representation is appropriate when viewed from digital side. We have adopted a gain matrix model for the state feedback and discrete-time transfer matrix model for program control. As a by-product, it was learned that robust stability compensation method is not mature enough for applications. Hence, we have investigated/developed a new and more useful stabilization method.2.Minimum Throughput-Time Configuration and Synchronization ControlFor single input and single output controllers, a shared memory and bus configuration was proposed. We ha … More ve investigated computational loading mechanism among each processor and proposed a new synchronization which achieves the minimum through-put time. The results were also extended to multiple-input and multiple-output cases.3.Verifying The Proposed SchemeSeveral supporting computer-software tools have been developed to verify those proposed schemes and also to be utilized in the process of design : Digital Signal Processor Command Generator, Throughput Estimator and Hybrid Simulator. Digital Signal Processor Command Generator gives program list written in the processor's command for a given digital-controller characteristics, the configuration and synchronization control protocol. Throughput Estimator evaluates throughput efficiency of a given control program. Hybrid Simulator simulates those digital control systems which include analog plant, A/D and D/A converters and digital controllers. Users can select different types of converters with different arithmetic employed and plants can be modeled as a block diagram using elementary blocks. Less

1.多处理器数字控制器的建模及其同步方案每个处理器都需要遵守时序约束，以避免命令信号冲突，并且最好不要有空闲时间间隔。对反馈型和程序控制型控制器的同步能力进行了验证，并选择了合适的模型。结果表明，离散时间系统表示是适当的，从数字方面来看。我们采用增益矩阵模型的状态反馈和离散时间转移矩阵模型的程序控制。作为一个副产品，据了解，鲁棒稳定补偿方法还不够成熟的应用。因此，我们已经研究/开发了一种新的和更有用的稳定化方法。2.最小化配置时间和同步控制对于单输入单输出控制器，提出了一种共享存储器和总线配置。我们 ...更多信息研究了各处理器之间的计算负载机制，提出了一种新的同步方法，使处理器的吞吐量达到最小。结果也被扩展到多输入和多输出的情况下。3.建议的方案已经开发了几个支持的计算机软件工具，以验证这些建议的方案，并在设计过程中使用：数字信号处理器命令发生器，吞吐量估计和混合模拟器。数字信号处理器命令发生器给出了针对给定数字控制器特性、配置和同步控制协议在处理器命令中写入的程序列表。吞吐量估算评估给定控制程序的吞吐量效率。混合仿真器是对数字控制系统的仿真，它包括模拟对象、A/D和D/A转换器以及数字控制器。用户可以选择不同类型的转换器，采用不同的算法，工厂可以建模为一个框图使用基本块。少