LSI Implementation of Correct Reaction Neural Network with Variable Synap ses

1）。本研究试图阐明大规模神经网络实施中出现的问题。首先，设计了带有CMOS电路的神经A/D转换器。使用不对称突触权重来避免神经 A/D 转换器的局部最小值问题。此外，芯片采用4mum CMOS技术制造。验证了其作为A/D转换器的成功作用，并提出了本电路误操作的一些可能原因。2）。我们已经制造了具有脉冲表示的神经电路微芯片。神经元输出是电压脉冲串。突触是一个恒流源，其输出与神经元输出的占空比成正比。通过 RC 电路收集突触电流来充电膜电位，提供类似于生物神经系统的模拟操作。我们使用4位SRAM作为突触权重的存储器。测量了神经元和突触的预期 I/O 特性。我们还通过将突触权重分配为 A/D 转换器和关联存储器来展示网络操作的能力。3)。设计并制造了一种用于未来模拟神经网络的开关扩散模拟存储器件（SDAM）。该器件本质上是一种改进的浮栅 MOSFET。现有的浮栅电势与输入脉冲数量的对数成反比变化，因此每个脉冲的注入电荷呈指数变化。在本研究中，浮栅分为两个部分来控制注入电荷。一种是小电容的注入部分，另一种是大电容的MOSFET。这两部分通过薄膜晶体管连接。通过注入部分的小电容，可以限制每个脉冲的注入电荷并且近似恒定。所制造的 SDAM 具有预期的性能。

1). This research attempts to clarify the problems with occur in implementation of a large-scale neural network. First, a neural A/D converter with CMOS circuits is designed. Asymmetrical synaptic weights were used to avoid the local minima problem for a neural A/D converter. Furthermore, a chip is fabricated using 4mum CMOS technology. Its successful action as an A/D converter is verified and some possible causes of misoperation of the present circuit are presented.2). We have fabricated a microchip of a neural circuit with pulse representation. The neuron output is a voltage pulse train. The synapse is a constant current source whose output is proportional to the duty ratio of neuron output. Membrane potential is charged by collection of synaptic currents through a RC circuit, providing an analog operation similar to the biological neural system. We used a 4-bit SRAM as the memory of a synaptic weight. The expected I/O characterivtics of the neurons and the synapses were measured. We have also demonstrated the ability of the network operation by assigning the synaptic weights as an A/D converter and an associate memory.3). A switched diffusion analog memory device(SDAM) for future analog neural networks is designed and fabricated. The device is essentially a modified floating-gate MOSFET. An existing floating-gate potential varies in inverse proportion to logarithm of number of input pulses, so the injection charge per pulse varies exponentially. In this research the floating-gate is divided into two parts to control the injection charge. One is the injection part with a small capacitance, and the other is MOSFET with a large capacitance. The two parts are connected with a thin film transistor. By the small capacitance of the injection part the injection charge per pulse can be limited and approximately constant. The fabricated SDAM was shown to have an expected performance.