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Research on iterative decoding of product code composed of majority logic decodable codes.

由多数逻辑可译码组成的乘积码的迭代译码研究

基本信息

批准号：
10650356
负责人：
OGIWARA Haruo
金额：
$ 2.24万
依托单位：
Nagaoka University of Technology
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (C)
财政年份：
1998
资助国家：
日本
起止时间：
1998 至 1999
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-10650356/
关键词：
product code majority logic iterative decoding turbo code coded modulation impulsive noise inter-symbol interference 繰り返し復号多数決論理復号

项目摘要

A method to get weight distribution of a product code by using importance sampling is proposed. Performance of the code is predicted and the validity of it is shown by simulation.Three types of simple decoding algorithm based on minimum reliability value is proposed. By comparing the results with those with the chase algorithm, performance is shown inferior within 1 dB and decoding speed is shown higher for a code with rate less than 45/63.A hardware decoder based on the proposed algorithm is design by using FPGA. Scale of the hardware and decoding speed is discussed and necessary improvement is shown.For a bursty impulsive noise channel, iterative decoding algorithm including noise state estimator is proposed for a block code and for a convolutional code. A performance evaluation method is proposed for a convolutional code.For an impulsive noise channel, soft-decision feedback equalizer is proposed for a product code. For a convolutional code, an equlaization and decoding algorithm is derived based on a composite trellis of the code and the channel.A iterative decoder for turbo trellis-coded modulation is designed with soft-output viterbi algorithm (SOVA) on a DSP. Since SOVA needs few multiplications, the ability of DSP is not fully used in the decoder.An serially concatenated coded modulation is proposed and investigated for a comparison. Bit error rate of the proposed system is shown to decrease rapidly by increasing an interleave size.

提出了一种利用重要性抽样的方法来确定产品代码的权重分布。对该码的性能进行了预测，并通过仿真验证了该码的有效性，提出了三种基于最小可靠值的简单译码算法。与Chase算法相比，在码率小于45/63的情况下，译码性能在1 dB以内有所下降，译码速度有所提高。针对突发脉冲噪声信道，分别提出了分组码和卷积码的迭代译码算法。提出了一种卷积码的性能评估方法，针对脉冲噪声信道，提出了乘积码的软判决反馈均衡器。针对卷积码，推导了一种基于码和信道的复合网格的均衡和译码算法，并在DSP上采用软输出维特比算法（SOVA）设计了Turbo网格编码调制的迭代译码器。由于SOVA算法乘法运算量小，DSP的处理能力在译码器中没有得到充分利用。所提出的系统的误码率示出通过增加交织大小迅速降低。