Thermal Deformation Analysis of Electronic Packages by Moire Interferometry and Phase-Shifting Method
莫尔干涉和相移法对电子封装的热变形分析
基本信息
- 批准号:13650091
- 负责人:
- 金额:$ 2.3万
- 依托单位:
- 依托单位国家:日本
- 项目类别:Grant-in-Aid for Scientific Research (C)
- 财政年份:2001
- 资助国家:日本
- 起止时间:2001 至 2002
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
In the present research work, moire interferometry was applied to analyze thermal deformations of electronic packages, QFP (Quad Flat Package), MCM (Multi Chip Module) and FC (Flip-Chip Package). High-resolution moire interferometry was also developed to determine thermal displacements and strains of electronic packages, SOJ (Small Outline J-Leaded Package) and Stacked-MCP (Multi Chip Package). The conclusions from the present study can be summarized as follows.The thermal deformations of QFP and MCM packages measured by moire interferometry showed that high deformations occurred at the edges and corners of the chip. When the QFP was mounted on PWB (Printed Wiring Board), the deformations increased due to the influence of the substrate with high CTE (Coefficient of Thermal Expansion). It is also found that the number of chips and their locations in MCM greatly affected the package deformation.The thermal deformations of FCs were evaluated and the effects of underfill and substrate were … More investigated. The results showed that the underfill created similar curvatures between the chip and substrate. The multi-layer substrate decreased the CTE mismatch between the chip and substrate and the bending deformations of the packages. It is found that the thermal strains of solder balls were the smallest in the package underfilled and mounted on multi-layer substrate.Phase-shifting moire interferometry and digital image processing were developed and applied to nano-order resolution measurement in the displacements. The digital image processing made it possible to analyze the strain fields accurately.The phase-shifting method was also applied to the thermal deformation analyses of SOJ and Stacked-MCP. The results of the two packages showed that the normal strains were high at the ends of the chip, and the shear strain concentrated at the chip corners. The strain values in SOJ increased by about 50% when the package was mounted on PWB. In Stacked-MCP, the normal strain also concentrated at the interface of the two chips. The shear strain at the ends of the lower chip increased by about 76% with a temperature change of 25 deg.C. Less
在目前的研究工作中,莫尔干涉仪被应用于分析电子封装、QFP(四方扁平封装)、MCM(多芯片模块)和FC(倒装芯片封装)的热变形。还开发了高分辨率莫尔干涉仪来确定电子封装、SOJ(小外形 J 引线封装)和堆叠式 MCP(多芯片封装)的热位移和应变。本研究的结论可概括如下。通过莫尔干涉测量法测量QFP和MCM封装的热变形表明,芯片的边缘和拐角处发生了较大的变形。当QFP安装在PWB(印刷线路板)上时,由于高CTE(热膨胀系数)基板的影响,变形增加。研究还发现,MCM 中的芯片数量及其位置极大地影响了封装变形。评估了 FC 的热变形,并研究了底部填充和基板的影响。结果表明,底部填充胶在芯片和基板之间产生了相似的曲率。多层基板减少了芯片和基板之间的CTE失配以及封装的弯曲变形。结果发现,底部填充并安装在多层基板上的封装中,焊球的热应变最小。开发了相移莫尔干涉仪和数字图像处理技术,并将其应用于纳米级分辨率的位移测量。数字图像处理使得精确分析应变场成为可能。相移方法也被应用于SOJ和Stacked-MCP的热变形分析。两种封装的结果表明,法向应变在芯片末端较高,剪切应变集中在芯片角部。当封装安装在 PWB 上时,SOJ 中的应变值增加了约 50%。在 Stacked-MCP 中,正应变也集中在两个芯片的界面处。温度变化25℃时,下芯片端部的剪切应变增加约76%。较少的
项目成果
期刊论文数量(26)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
森田康之, et al.: "電子デバイスの高温熱変形評価"日本機械学会講演論文集. NO.01-16. 139-140 (2001)
Yasuyuki Morita 等人:“电子器件高温热变形的评估”日本机械工程师学会会议记录 NO.01-16(2001)。
- DOI:
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Y.Morita, et al.: "Thermal Deformation Analysis of Flip-Chip Packages by Moire Interferometry and FEA"Reports of Research Institute for Applied Mechanics. 121. 127-130 (2001)
Y.Morita等人:“通过莫尔干涉测量法和FEA对倒装芯片封装进行热变形分析”应用力学研究所的报告。
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- 影响因子:0
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Y.Morita, et al.: "Thermal Strain Analysis of SOJ Electronic Package by Phase-shifting Moire Interferometry"Journal of JSEM. 3-1. 28-33 (2003)
Y.Morita 等人:“通过相移莫尔干涉测量法对 SOJ 电子封装进行热应变分析”JSEM 杂志。
- DOI:
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- 影响因子:0
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Y.Morita, et al.: "Thermal Deformation Analysis of Flip-Chip Devices by Moire Interferometry"Journal of JIEP. 5-7. 654-659 (2002)
Y.Morita 等人:“通过莫尔干涉测量法对倒装芯片器件进行热变形分析”JIEP 杂志。
- DOI:
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- 影响因子:0
- 作者:
- 通讯作者:
新川和夫, et al.: "モアレ干渉法による変位場計測 〜ICパッケージの熱変形解析への応用〜"日本実験力学会第1回研究発表講演会講演論文集. No.1. 113-116 (2001)
Kazuo Shinkawa 等人:“使用莫尔干涉测量法进行位移场测量 - 在 IC 封装的热变形分析中的应用 -”日本实验力学学会第一届研究演示讲座论文集第 1. 113-116 号(2001 年)。
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- 批准号:
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- 批准号:
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- 批准号:
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- 资助金额:
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