Thermal Deformation Analysis of Electronic Packages by Moire Interferometry and Phase-Shifting Method

莫尔干涉和相移法对电子封装的热变形分析

• 批准号: 13650091
• 负责人: ARAKAWA Kazuo
• 金额: $ 2.3万
• 依托单位: Kyushu University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2001
• 资助国家: 日本
• 起止时间: 2001 至 2002
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-13650091/
• 关键词: Electronic Package; Thermal Deformation Analysis; Evaluation of Reliability; Moire Interferometry; Phase-Shifting Method; Displacement Distribution; Strain Distribution; フリップチップ

In the present research work, moire interferometry was applied to analyze thermal deformations of electronic packages, QFP (Quad Flat Package), MCM (Multi Chip Module) and FC (Flip-Chip Package). High-resolution moire interferometry was also developed to determine thermal displacements and strains of electronic packages, SOJ (Small Outline J-Leaded Package) and Stacked-MCP (Multi Chip Package). The conclusions from the present study can be summarized as follows.The thermal deformations of QFP and MCM packages measured by moire interferometry showed that high deformations occurred at the edges and corners of the chip. When the QFP was mounted on PWB (Printed Wiring Board), the deformations increased due to the influence of the substrate with high CTE (Coefficient of Thermal Expansion). It is also found that the number of chips and their locations in MCM greatly affected the package deformation.The thermal deformations of FCs were evaluated and the effects of underfill and substrate were … More investigated. The results showed that the underfill created similar curvatures between the chip and substrate. The multi-layer substrate decreased the CTE mismatch between the chip and substrate and the bending deformations of the packages. It is found that the thermal strains of solder balls were the smallest in the package underfilled and mounted on multi-layer substrate.Phase-shifting moire interferometry and digital image processing were developed and applied to nano-order resolution measurement in the displacements. The digital image processing made it possible to analyze the strain fields accurately.The phase-shifting method was also applied to the thermal deformation analyses of SOJ and Stacked-MCP. The results of the two packages showed that the normal strains were high at the ends of the chip, and the shear strain concentrated at the chip corners. The strain values in SOJ increased by about 50% when the package was mounted on PWB. In Stacked-MCP, the normal strain also concentrated at the interface of the two chips. The shear strain at the ends of the lower chip increased by about 76% with a temperature change of 25 deg.C. Less

本研究将云纹干涉法应用于QFP、MCM和FC等电子封装的热变形分析。高分辨率莫尔干涉测量法也被开发用于确定电子封装、SOJ（小外形J引线封装）和堆叠MCP（多芯片封装）的热位移和应变。本研究的主要结论如下：利用云纹干涉法测量QFP和MCM封装的热变形，结果表明，在芯片的边缘和角落处发生了较大的变形。当QFP安装在PWB（印刷线路板）上时，由于具有高CTE（热膨胀系数）的基板的影响，变形增加。分析了FC的热变形，并对MCM中芯片的数量和位置对FC热变形的影响进行了分析， ...更多信息 研究了结果表明，双折射在芯片和衬底之间产生了相似的曲率。多层衬底减小了芯片与衬底之间的热膨胀系数失配，减小了封装的弯曲变形。结果表明，在多层基板上封装时，焊球的热应变最小。提出了相移云纹干涉法和数字图像处理技术，并将其应用于纳米级位移的测量。数字图像处理技术使应变场的精确分析成为可能，相移法也被应用于SOJ和Stacked-MCP的热变形分析。结果表明，两种封装的法向应变在芯片端部较高，切向应变集中在芯片角部。当封装安装在PWB上时，SOJ中的应变值增加了约50%。在堆叠MCP中，法向应变也集中在两个芯片的界面处。温度变化25 ℃时，下部芯片端部的剪切应变增加约76%。少

项目成果

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Y.Morita 等人：“通过莫尔干涉测量法对倒装芯片器件进行热变形分析”JIEP 杂志。

新川和夫, et al.: "モアレ干渉法による変位場計測 〜ICパッケージの熱変形解析への応用〜"日本実験力学会第1回研究発表講演会講演論文集. No.1. 113-116 (2001)

Kazuo Shinkawa 等人：“使用莫尔干涉测量法进行位移场测量 - 在 IC 封装的热变形分析中的应用 -”日本实验力学学会第一届研究演示讲座论文集第 1. 113-116 号（2001 年）。