Trial Fabrication of CMOS Devices only by a Thermal Diffusion Method in the Impurity Doping

仅用热扩散法进行杂质掺杂的CMOS器件的试制

• 批准号: 13680216
• 负责人: NAKAMURA Shunzaburo
• 金额: $ 0.77万
• 依托单位: Ariake National College of Technology
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2001
• 资助国家: 日本
• 起止时间: 2001 至 2002
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-13680216/
• 关键词: engineering education; semiconductor engineering; integrated circuit; CMOS; MOSFET; 学校教育; MOS集積回路; CMOSプロセス

It is significant for an education of semiconductor engineering that CMOS integrated circuits can be fabricated because of their utility. A purpose of this study is to find a CMOS process for the education that impurity doping is made only with thermal diffusion method. The process that does not need expensive facilities such as ion implantation facility is convenient in national college of technology. Concretely, fabrication of an inverter-circuit, that is the simplest CMOS device was an aim of the study.In the first half of a study, a condition to form deep diffused layer called p-type well on the n-type Si wafer was examined and a formations of PN junction between the well and the wafer were confirmed. Also, the formation of PN junction between the p-type well and n-type diffused layer on it was confirmed.In the latter half of the study, a trial fabrication of the inverter circuit was made. The gate-length of the MOSFETs was designed by 50μm. In the fabrication process, eight pieces of hand-made photo-mask were used. Only one of ten pieces of samples operated as the inverter not enough. However, the fabrication possibility of CMOS device was confirmed fully.

由于CMOS集成电路的实用性，它的可制造性对于半导体工程的教育具有重要意义。本研究的目的之一是寻找一种CMOS工艺，以教育杂质掺杂仅用热扩散法。不需要昂贵的设备，如离子注入设备的过程是方便的国立技术学院。具体地说，本研究的目的是制作一种最简单的CMOS器件--反相电路。在研究的前半部分，研究了在n型Si晶片上形成称为p型阱的深扩散层的条件，并证实了在阱和晶片之间形成PN结。在后半部分的研究中，我们进行了反相电路的试制。MOSFET的栅长设计为50μm。在制作过程中，使用了8片手工制作的光掩模。十件样品中只有一件作为逆变器运行，这是不够的。但是，充分证实了CMOS器件的制造可能性。