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Development of high-speed LiNb3 optical switch with CMOS driver circuit

CMOS驱动电路高速铌酸锂光开关的研制

基本信息

批准号：
15360032
负责人：
YOSHIDA Keiji
金额：
$ 9.66万
依托单位：
KYUSHU UNIVERCITY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2003
资助国家：
日本
起止时间：
2003 至 2006
项目状态：
已结题

项目摘要

"Optical switch" is the key device, which changes the route of optical signal without electro-optic conversion. In the high-speed optical communications, external optical switches using a LiNbO_3 and semiconductor devices have already been operated for practical use. There have still been great needs for realizing higher-speed and lower power optical switch for small networks, i.e., router, rather than main networks. The modulation voltage applied from the driver circuit must be transmitted to the open-ended transmission line. In this resarch, we designed the high speed and low-power driver circuit connected to the open-end transmission line for realizing high-speed optical switch.For realizing the low power dissipation, we adopted the CMOS inverter structure as a core circuit, so that, we obtain the stand-by power less driver circuit. In order to obtain the switching voltage of our LiNbO_3 optical switch, we stacked each nMOS and pMOS FET.The propagation delay of CMOS inverters depend … More s on the load capacitance (C_L) and the output resistance (R_<out>), where C_<out> mainly consists of parasitic capacitance of MOS on this circuit. C_<out> and R_<out> should be small values to suppress the propagation delay. However, when the gate width is increased in order to obtain the small value of R_<out>, C_<out> increases. To solve this problem, we compensated for C_<out> by inserting lumped inductance (L) in the output of the driver circuit. However, in the CMOS process, it is difficult to fabricate large inductance by spiral inductor because of the self-resonance and stray impedances in high frequency range. So, we propose a new method, which decrease C_<out> and gate capacitance by dividing gates width into n stage and compensate each capacitances by inserting transmission lines with high characteristic impedance between the output and input point of the divided drain line and gate line. Switching time from 10% to 90% V_<out> of the distributed type driver is 0.0315 nsec which is 31.5% faster than that of previous version. Less

“光开关”是光通信系统中的关键器件，它在不进行电光转换的情况下改变光信号的传输路径。在高速光通信中，使用LiNbO_3和半导体器件的外部光开关已经投入实际应用。对于实现用于小型网络的更高速度和更低功率的光开关，即，路由器，而不是主要网络。从驱动器电路施加的调制电压必须被传输到开路端传输线。为了实现高速光开关，设计了一种高速低功耗的驱动电路，该驱动电路连接在开路传输线上，采用CMOS反相器结构作为核心电路，实现了低功耗的待机驱动。为了获得LiNbO_3光开关的开关电压，我们将每个nMOS和pMOS FET堆叠起来，CMOS反相器的传输延迟取决于 ...更多信息 s对负载电容C_L和输出电阻R_L的影响<out>，其中C_L<out>主要由电路中MOS管的寄生电容组成。C_<out>和R_<out>应该是小值以抑制传播延迟。然而，当为了获得小的R_值而增加栅极宽度时<out>，C_<out>增加。为了解决这个问题，我们<out>通过在驱动器电路的输出中插入集总电感（L）来补偿C_。然而，在CMOS工艺中，由于高频范围内的自谐振和杂散阻抗的影响，很难用螺旋电感来制作大电感。为此，我们提出了一种新的方法，<out>通过将栅宽分成n级来减小C_和栅电容，并通过在划分的漏极线和栅线的输出和输入点之间插入高特性阻抗的传输线来补偿各个电容。分布式驱动程序从10%V_到90%V_的切换时间<out>为0.0315 nsec，比前一版本快31.5%。少

项目成果

期刊论文数量（56）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Design of a CMOS Driver Circuit Connected to Transmission Line for High Sped and Low Power Optical Switch

高速低功耗光开关传输线CMOS驱动电路设计

DOI：
发表时间：
2006
期刊：
Proc. 2006 China-Japan Joint Microwave Conference
影响因子：
0
作者：
Haruichi KANAYA et al.;Haruichi KANAYA et al.;Haruichi KANAYA et al.;Haruichi KANAYA et al.;Keiji Yoshida et al.;H.Kanaya;H.Kanaya;K.Yoshida;H.Kanaya;H.Kanaya;H.Kanaya;H.Kanaya;H.Kanaya;Haruichi KANAYA et al.;Haruichi KANAYA et al.;Haruichi KANAYA et al.;Haruichi KANAYA et al.
通讯作者：
Haruichi KANAYA et al.

Design of Coplanar Waveguide Matching Circui for RF-CMOS Front-End

RF-CMOS前端共面波导匹配电路设计

DOI：
发表时间：
2005
期刊：
Electronics and Communications in Japan Part 2, Vol.88, No.7
影响因子：
0
作者：
H.Kanaya;F.Koga;K.Seki;K.Yoshida;H.Kanaya;H.Kanaya;K.Yoshida;H.Kanaya;Y.Tsutsumi;K.Yoshida;H.Kanaya
通讯作者：
H.Kanaya

Design of Coplanar Waveguide Matching Circuit for RF-CMOS Front-End

RF-CMOS前端共面波导匹配电路设计