MIMO Block Coding High Throughput Wireless LAN Chip Design and its Application to Ubiquitous Networks

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The aim of this project is to develop a high throughput MIMO wireless LAN chip. The obtained results in each year are following, respectively.2004 : Algorithm and architecture design in terms of up to 600Mbps WilAN system including IEEE802.11n draft specification. We have developed a combined MIMO decode algorithm capable of STBC and LST MIMO encoding which can increase data rate and coverage, simultaneously.2005 : An architecture design and verification were carried out under fixed point arithmetic in order to verify the design feasibility towards an actual ASIC chip design.2006 : RTL design for each IPs.2007 : FPGA prototyping in terms of 600Mbps MIMO Tx-Rx system. We have obtained desired bit error performance under some fading channel models.