课题基金 / 基金详情

Integrated Circuit for Low-Frequency Sensor Signal Processing with Natural-Energy Power Supply

Integrated Circuit for Low-Frequency Sensor Signal Processing with Natural-Energy Power Supply
使用自然能源电源进行低频传感器信号处理的集成电路
批准号:
20760237
负责人:
WADA Kazuyuki
金额:
$2.0万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Young Scientists (B)
财政年份:
2008
资助国家:
日本
项目状态:
已结题
起止时间:
2008 至 2009

项目摘要

项目成果

WADA Kazuyuki的其他基金

相似基金

相关文献

中文摘要
翻译
点击翻译按钮获取中文摘要
英文摘要
An integrated circuit for low-frequency signal processing is developed to measure biological signals through wireless communication with portable equipments which are powered by energy source, the supply voltage of which is less than 1 V. First, filters for noise suppression, band limitation and baseband modulation are designed aiming at the point that the low-voltage and low-power filter structure which we have proposed is appropriate for baseband signal processing. A practical 0.6-V filter processing sensor signals is obtained even with 0.18-μm technology to achieve 89-dB dynamic range. Second, analog-to-digital converters (ADCs) following band limitation filters are considered. Successive approximation (SA),ΔΣ, and signal decomposition based pipeline types of architectures are investigated for low frequency and low voltage. Their noise performances are theoretically analyzed in detail and some techniques to enlarge signal-to-noise ratio by changing both wasteful structure are proposed. Last, digital substrate noise is coped with. Effectiveness with respect to a lot of noise sources are taken into account and a reliable simple model is introduced so that noise propagation in 3-D bulk is quantitatively discussed and 2 topologies effective for substrate noise suppression are derived. In conclusion, we are now sure that the aimed baseband signal processing is realizable with less than 0.8V.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
広範囲に分布するディジタル回路で発生する基板雑音の打ち消し回路
用于消除广泛分布的数字电路中产生的板噪声的电路
DOI: --
发表时间: 2009
期刊: 電子情報通信学会和文論文誌A Vol.J92-A
影响因子: --
作者: [鈴木寛人, 和田和千, 田所嘉昭]
通讯作者: 田所嘉昭
2次ΔΣADCに対する利得可変積分回路の適用
可变增益积分电路在二阶ΔΣADC中的应用
DOI: --
发表时间: 2008
期刊:
影响因子: --
作者: [小山靖仁, 和田和千, 田所嘉昭]
通讯作者: 田所嘉昭
比較器のオフセット電圧への耐性を高めた1.5bitパイプライン型ADC
1.5 位流水线 ADC,具有更高的比较器失调电压容差
DOI: --
发表时间: 2009
期刊:
影响因子: --
作者: [中川雄介, 和田和千]
通讯作者: 和田和千
MOSトランジスタを分割することで熱雑音を低減した増幅回路
通过分割MOS晶体管来降低热噪声的放大器电路
DOI: --
发表时间: 2009
期刊:
影响因子: --
作者: [鈴木寛人, 和田和千, 田所嘉昭]
通讯作者: 田所嘉昭
15
    Integrated Circuit Design Techniques of Energy Harvesting PoweredAnalog Signal Processing in Sensor and Power Network
    海外基金