Energy Optimization for Asynchronous Circuits using Freedom of Execution Speed

在本研究中，我们利用执行速度的自由来优化异步电路的能耗。与同步电路中所有操作的执行时间由全局时钟信号决定不同，异步电路中每个操作的执行时间可以自由决定。利用这种自由度，进行能量优化。本研究的结果分为两个子结果。第一个用于特定电路，第二个用于处理器。针对特定电路，提出了一种能量优化方法。对于给定的应用程序行为描述、延迟约束和资源库，该方法计算在行为合成期间为开始时间定义的每个操作的空闲时间。然后，将慢速电路分配给有松弛的操作。在处理器方面，我们设计了一种针对FPGA和ASIC实现的异步AVR处理器。在能量优化方面，提出了面积优化和性能优化方法。与同步AVR处理器相比，我们的异步AVR处理器的能耗是同步AVR处理器的一半。

In this research, we optimize asynchronous circuits in terms of energy consumption using freedom of execution speed. Different from synchronous circuits where execution timing of all operations is decided by a global clock signal, execution timing of each operation in asynchronous circuits can be decided freely. Using this freedom, energy optimization is carried out. The result of this research is classified into two sub result. The first is for specific circuits and the second is for processor. For specific circuits, we proposed an energy optimization method. For given behavioral description of an application, latency constraint, and resource library, the proposed method calculates slack for each operation defined for the start time during behavioral synthesis. Then, slow circuits are allocated to operations which have slack. For processor, we designed an asynchronous AVR processor aimed for FPGA and ASIC implementations. Also, for energy optimization, we proposed area optimization and performance optimization methods. Comparing to synchronous AVR processor, the energy consumption of our asynchronous AVR processor was half of the synchronous one.