课题基金 / 基金详情

CMOSデバイスに向けたゲルマニウム基板上高誘電率絶縁膜ゲートスタック技術

CMOSデバイスに向けたゲルマニウム基板上高誘電率絶縁膜ゲートスタック技術
CMOS器件用锗衬底高介电常数绝缘膜栅叠层技术
批准号:
12J09309
负责人:
張 睿
金额:
$1.28万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for JSPS Fellows
财政年份:
2012
资助国家:
日本
项目状态:
已结题
起止时间:
2012 至 2013

项目摘要

项目成果

相关文献

中文摘要
翻译
点击翻译按钮获取中文摘要
英文摘要
Ge channel is one of the most promising solution for CMOS devices in post-Si age. Mobility enhancement is the most critical issue limiting the application of Ge MOSFETS. Recently, although many progresses have been achieved for high mobility Ge MOSFETs, mobility degradation in high normal field region is still severe which strongly reduces the ON state current in Ge MOSFETs. The mechanism of this phenomenon is not clear yet, in spite of importance. Therefore, in our research the physical origins causing high normal field mobility degradation were systematically investigated. Through the evaluation of Hall mobility in Ge MOSFETs, it is found that large amount of surface states exist inside valence and conduction band of Ge, which results in significant decrease of mobile carrier concentration in the channel and rapid reduction of effective mobility of Ge MOSFETs.Additionally, it is confirmed that the surface states inside conduction band of Ge can be passivated by annealing the Ge nMOSFETs in atomic deuterium ambient. Besides of surface states, it is also confirmed that the surface state roughness scattering dominates the mobility in high normal field for Ge MOSFETs, similar with the situation in Si MOSFETs. With decreasing the post oxidation temperature, the surface roughness at GeOx/Ge interfaces can be sufficiently reduced without losing the superior electrical passivation much. As a result, around 20% and 25% mobility enhancement can be realized for Ge pMOSFETs and nMOSFETs, respectively, in a high normal field region of N_s=10^<13> cm^<-2> by reducing the post oxidation temperature from 300℃ down to room temperature.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
DOI: 10.1109/iedm.2012.6479051
发表时间: 2012-12
期刊: 2012 International Electron Devices Meeting
影响因子: --
作者: [Rui Zhang;Po-Chin Huang;Ju-Chin Lin;M. Takenaka;S. Takagi]
通讯作者: Rui Zhang;Po-Chin Huang;Ju-Chin Lin;M. Takenaka;S. Takagi
DOI: --
发表时间: 2013-06
期刊: 2013 Symposium on VLSI Technology
影响因子: --
作者: [Rui Zhang;J.C. Lin;Xiao Yu;M. Takenaka;Shinichi Takagi]
通讯作者: Rui Zhang;J.C. Lin;Xiao Yu;M. Takenaka;Shinichi Takagi
High mobility Ge pMOSFETs with 0.7 nm ultrathin EOT using Hf02/A1203/Ge0x/Ge gate stacks fabricated by plasma post oxidation
使用通过等离子体后氧化制造的 Hf02/A12O3/Ge0x/Ge 栅极叠层,具有 0.7 nm 超薄 EOT 的高迁移率 Ge pMOSFET
DOI: --
发表时间: 2012
期刊:
影响因子: --
作者: [R. Zhang, P. C. Huang, N. Taoka, M. Takenaka, S. Takagi]
通讯作者: S. Takagi
Suppression of Surface States inside Conduction Band and Effective Mobility Improvement of Ge nMOSFETs by Atomic Deuterium Annealing
通过原子氘退火抑制导带内的表面态并有效提高 Gen nMOSFET 的迁移率
DOI: --
发表时间: 2013
期刊:
影响因子: --
作者: [R. Zhang, J-C. Lin, X. Yu, M. Takenaka and S. Takagi]
通讯作者: M. Takenaka and S. Takagi
9