C6: Correct-by-Construction Heterogeneous Coherence

C6：构造修正异质相干性

• 批准号: EP/V028154/1
• 负责人: Antonio Barbalace
• 金额: $ 63.03万
• 依托单位: University of Edinburgh
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2021
• 资助国家: 英国
• 起止时间: 2021 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FV028154%2F1
• 关键词: C6; Correct; Construction; Heterogeneous; Coherence

About 55 years ago, Gordon Moore speculated that transistors will become smaller and more energy efficient every year. Since then, we have enjoyed exponentially increasing computer performance owing to what has been called the Moore's law. However, Moore's law is coming to an end and has already begun to disrupt the semiconductor industry. Absent the exponential performance and energy gains due to device scaling, industry has pivoted to hardware specialisation: targeting hardware to a specific computation class generally leads to orders of magnitude improvement in energy and performance.We are well and truly in the age of heterogeneous computing. A modern smartphone today has dozens of devices within a single chip, including CPUs, GPUs, and other accelerators. But efficiency hinges on reducing data movement between these devices; otherwise, it can seriously jeopardise the benefits of heterogeneous computing. Sadly, an analysis of Google workloads on a mobile device reveals that, on average, more than 60% of the overall energy is spent on moving around data.One promising approach to reducing data movement is called cache coherence. The cache coherence protocol, which automatically replicates data consistently, enables data to be accessed locally when it is safe to do so. Thus, it not only minimises data movement but it also does so in a programmer-transparent fashion. However, cache coherence protocols are notoriously hard to design and verify even for homogeneous multicores, where they have been deployed today. To make matters worse, we do not know how to keep the devices of a heterogeneous computer coherent correctly, in part because we do not yet understand what it means to be correct. In this project, we propose an entirely new way of designing coherence protocols. Instead of manually designing them and verifying them later, we propose an automatic method to generate them correctly. Our method is based on a new foundation of heterogeneous coherence called compound consistency models, which formally answers the question of how distinct coherence protocols should compose. If successful, the project will not only lift the major roadblock to efficient heterogeneous computing (data movements costs), it will also catalyse the burgeoning open hardware movement by democratising one of its trickiest components: cache coherence protocols.

大约55年前，戈登摩尔推测，晶体管每年都会变得更小，更节能。从那时起，由于所谓的摩尔定律，我们享受了计算机性能的指数级增长。然而，摩尔定律即将终结，已经开始颠覆半导体行业。由于设备扩展没有带来指数级的性能和能源收益，行业已经转向硬件专业化：将硬件定位于特定的计算类别通常会导致能源和性能的数量级改善。我们确实处于异构计算时代。今天的现代智能手机在一个芯片中有几十个设备，包括CPU，GPU和其他加速器。但是效率取决于减少这些设备之间的数据移动;否则，它可能会严重损害异构计算的好处。不幸的是，对移动终端上的Google工作负载的分析显示，平均而言，超过60%的总能量花费在移动数据上。一种有希望减少数据移动的方法被称为缓存一致性。该高速缓存一致性协议自动一致地复制数据，使数据能够在安全的情况下在本地访问。因此，它不仅最大限度地减少了数据移动，而且还以程序员透明的方式做到了这一点。然而，高速缓存一致性协议是出了名的难以设计和验证，即使是同构多核，他们已经部署在今天。更糟糕的是，我们不知道如何正确地保持异构计算机的设备一致性，部分原因是我们还不明白正确意味着什么。在这个项目中，我们提出了一个全新的方式来设计一致性协议。我们提出了一种自动生成它们的方法，而不是手动设计它们并在以后进行验证。我们的方法是基于一个新的基础上的异构一致性称为复合一致性模型，正式回答的问题，不同的一致性协议应该组成。如果成功的话，该项目不仅将解除高效异构计算的主要障碍（数据移动成本），还将通过民主化其最棘手的组件之一：缓存一致性协议来催化蓬勃发展的开放硬件运动。

项目成果

Compound Memory Models

• DOI: 10.1145/3591267
• 发表时间: 2023-06
• 期刊: Proceedings of the ACM on Programming Languages
• 作者: Andrés Goens;S. Chakraborty;Susmit Sarkar;Sukarn Agarwal;Nicolai Oswald;V. Nagarajan

HeteroGen: Automatic Synthesis of Heterogeneous Cache Coherence Protocols

HeteroGen：异构缓存一致性协议的自动综合

• 发表时间: 2022
• 期刊: 28th IEEE International Symposium on High-Performance Computer Architecture
• 作者: Oswald, Nicolai;Nagarajan, Vijay;Sorin, Daniel;Gavrielatos, Vasilis;Olausson, Theo;Carr, Reece
• 通讯作者: Carr, Reece