III-V quantum dot lasers grown on patterned silicon and SOI substrates by MBET first year

MBET 第一年在图案化硅和 SOI 基板上生长 III-V 量子点激光器

• 批准号: 2433499
• 金额: --
• 依托单位: University College London
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2020
• 资助国家: 英国
• 起止时间: 2020 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-2433499
• 关键词: III; quantum; dot; lasers; grown

There is a strong demand for integrating of III-V materials and devices on silicon platform for high-efficient photonics light sources and high mobility electronics devices. However, there are significant challenges for direct epitaxial growth, including anti-phase boundaries (APBs), threading dislocations (TDs) and micro-cracks. In last few years, significant progress has been made in reducing these three types of defects with a few micrometre III-V buffer layers. In addition, the total thickness of III-V layers is limited to a few micrometres (< 6um) by the formation of micro-cracks due to a mismatch in thermal expansion between the III-V epilayers and a Si substrate. In this project, we will exploit the potential of patterned silicon to suppress the defect formation within the patterned area on Si or SOI substrates. Most importantly, we would like to grow nano-size holes within the patterned areas by grow group-IV materials, such as Si and Ge by using twin-MBE system at UCL to relax the strain between III-V layers and silicon substrates, and hence to solve the problem due to thermal expansion mismatch between III-V layers and silicon substrates.

对于在硅平台上集成III-V族材料和器件以用于高效光子光源和高迁移率电子器件存在强烈的需求。然而，直接外延生长存在显著的挑战，包括反相边界（APB）、穿透位错（TD）和微裂纹。在过去的几年中，已经取得了重大进展，减少这三种类型的缺陷与几微米III-V缓冲层。此外，由于III-V族外延层和Si衬底之间的热膨胀失配而形成微裂纹，III-V族层的总厚度被限制在几微米（<6 μ m）。在本计画中，我们将利用图案化矽来抑制矽或SOI基板上图案化区域内的缺陷形成。最重要的是，我们希望通过在UCL使用双MBE系统生长IV族材料（例如Si和Ge）来在图案化区域内生长纳米尺寸的孔，以缓解III-V层和硅衬底之间的应变，从而解决由于III-V层和硅衬底之间的热膨胀失配而引起的问题。