Field programmable chips and systems: architecture exploration, CAD tool development and novel applications

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Field programmable chips and systems are a very popular implementation medium for digital systems targeting a wide range of applications in consumer and automotive electronics, communications, networking, etc. In order to utilize their full potential, research is needed for the development of new CAD tools to help the designers in mapping their designs effectively to the target systems. Also as the complexity of the designs implemented continues to grow, research is needed in developing new architectures that can efficiently implement a wide range of designs. Due to their huge logic capacity, current FPGAs are effectively Field Programmable Systems on Chips (FPSoCs). Hence to utilize their resources effectively design based on parameterizable and reusable Intellectual Property (IP) cores needs to be explored. Network-on-chip (NoC) is a promising interconnection scheme for FPSoCs implemented using multiple IP cores. Hence NoC architectures suitable for FPGAs need to be explored. Finally, novel applications in areas such as digital signal processing need to be explored. The objectives of our research in this area are: (a) Develop NoCBuild, a CAD tool for Design Space Exploration (DSE) of NoC components/building blocks. (b) Develop a VHDL library of parameterizable NoC components that will be used by NoCBuild CAD tool. (c) Develop and where possible, acquire a suite of real world benchmark applications for evaluating NoC-based systems. (d) Explore NoC architectures for implementing a variety of multi-spectral image processing algorithms. (e) Develop a configurable IP core that provides high performance FPGA implementation of parallel turbo decoders. Explore novel applications of field programmable chips and systems in different areas of digital signal processing. One of the goals is to develop intellectual property cores for real world applications that can be potentially useful for designers in the industry. This work will contribute towards the development of CAD tools and NoC architectures that will be very useful to designers of the next generation of FPSoCs in Canada.