Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
基本信息
- 批准号:RGPIN-2015-04618
- 负责人:
- 金额:$ 3.13万
- 依托单位:
- 依托单位国家:加拿大
- 项目类别:Discovery Grants Program - Individual
- 财政年份:2016
- 资助国家:加拿大
- 起止时间:2016-01-01 至 2017-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Computer chips, computer systems, and computer software are the most complex things ever designed by humans. For example, even the simple programs written by our students in their first computer science course have far more possible behaviors than there are photons in the universe! Not surprisingly, it's hard to get all the details right. In fact, companies now spend the most effort not on design, but on verification -- the task of determining if the system behaves correctly.
Formal verification is the use of mathematical logic to aid the verification process. My research emphasizes automatic formal verification, in which a computer program analyzes the system being designed, automatically finding bugs or proving properties about the design, with minimal human effort beyond specifying what is desired. Research breakthroughs over the past twenty years have made formal verification indispensible for verifying computer hardware -- all major computer companies use formal verification on their computer chips. This has been a big success story of academic research creating enormous value for society. With more recent research breakthroughs, automated formal verification is becoming mainstream for software verification as well.
Much of the impact of computing, however, comes not from hardware or software, per se, but from actual, life-changing, "smart" products -- the smartphone being the most obvious example, but with the coming Internet of Things, all sorts of everyday objects will become smart and connected. Smart products are the result of tightly integrated hardware and software, and it's obviously important to get this integration correct. However, companies are having great difficulty creating these new products, because hardware and software have fundamentally different models of computation, resulting in mistakes when integrating the two.
This proposal focuses on developing theoretical and practical tools for verifying the interaction between hardware and software. In some respects, this combines all of the challenges of automated formal verification of hardware and software, because verification must reason about both. On the other hand, I believe that there are certain characteristics and design patterns that can be exploited to enable practical, automatic formal verification at the hardware/software boundary. If successful, this research will generate a large quality and productivity boost for creating any smart product.
计算机芯片、计算机系统和计算机软件是人类设计的最复杂的东西。例如,即使是我们的学生在他们的第一个计算机科学课程中编写的简单程序,其可能的行为也比宇宙中的光子多得多!毫不奇怪,很难把所有的细节都做好。事实上,公司现在花最多的精力不是在设计上,而是在验证上——确定系统是否正确运行的任务。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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{{ truncateString('Hu, Alan', 18)}}的其他基金
Automated Formal Verification for Domain-Specific Hardware Acceleration
针对特定领域硬件加速的自动形式验证
- 批准号:
RGPIN-2020-07182 - 财政年份:2022
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
Automated Formal Verification for Domain-Specific Hardware Acceleration
针对特定领域硬件加速的自动形式验证
- 批准号:
RGPIN-2020-07182 - 财政年份:2021
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
Automated Formal Verification for Domain-Specific Hardware Acceleration
针对特定领域硬件加速的自动形式验证
- 批准号:
RGPIN-2020-07182 - 财政年份:2020
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
RGPIN-2015-04618 - 财政年份:2019
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
RGPIN-2015-04618 - 财政年份:2018
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
RGPIN-2015-04618 - 财政年份:2017
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
477861-2015 - 财政年份:2017
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Accelerator Supplements
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
477861-2015 - 财政年份:2016
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Accelerator Supplements
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
477861-2015 - 财政年份:2015
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Accelerator Supplements
Automated Formal Verification at the Hardware/Software Boundary
硬件/软件边界的自动形式验证
- 批准号:
RGPIN-2015-04618 - 财政年份:2015
- 资助金额:
$ 3.13万 - 项目类别:
Discovery Grants Program - Individual
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针对特定领域硬件加速的自动形式验证
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硬件/软件边界的自动形式验证
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- 资助金额:
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硬件/软件边界的自动形式验证
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