Fully ballance coded transmission for high-speed inter- and intra-chip data communication **

用于高速芯片间和芯片内数据通信的完全平衡编码传输**

• 批准号: 537288-2018
• 负责人: Ardakani, Masoud
• 金额: $ 1.82万
• 依托单位: University of Alberta
• 依托单位国家: 加拿大
• 项目类别: Engage Grants Program
• 财政年份: 2018
• 资助国家: 加拿大
• 起止时间: 2018-01-01 至 2019-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=644100
• 关键词: Fully; ballance; coded; transmission; speed

Ultra-high speed inter-chip and intra-chip communications have created new communication challenges. To achieve the required throughput per area (chip area), designers are considering non-binary modulations, faster transmission or increasing the number of inter-circuit communication links (buses) which simultaneously transfer data. All these solutions make links more vulnerable to the existing diverse noises such as crosstalk, dispersion, reflection, and common-mode noises. Suggested solutions significantly increase the power consumption in the chip because they result in higher detection complexity, higher resource allocation, and power consumption. **Recently, forward error correction (FEC) coding is considered as a promising solution. However, existing FECs are not designed for the challenging problem of inter-chip communications and its severe constraints. Considering these constraints, in this work, we introduce a new concept that we refer to as fully-balanced coded transmission (FBCT) in which half of the links transfer (+1) and the other half transfer (-1). While FBCT has the potential to significantly reduce existing noises in inter-chip communications, it brings about new challenges. In particular, as discussed FBCT is by nature based on non-linear FECs. Hence, we need to tackle some challenging problems. First, non-linear codes are not studied extensively in the literature. Second, the balanced nature of the code, i.e., having the same number of zeroes and ones (-1 and +1 when modulated) is a new constraint, not considered ever before. Optimizing the code, mapping the information blocks to codewords, and optimally and efficiently decoding the code are all challenges to be handled in this project.**

超高速芯片间和芯片内通信带来了新的通信挑战。为了达到所需的单位面积吞吐量(芯片面积)，设计人员正在考虑非二进制调制、更快的传输或增加同时传输数据的电路间通信链路(总线)的数量。所有这些解决方案都使链路更容易受到现有各种噪声的影响，如串扰、色散、反射和共模噪声。建议的解决方案显著增加了芯片的功耗，因为它们会导致更高的检测复杂性、更高的资源分配和功耗。**最近，前向纠错(FEC)编码被认为是一种有前途的解决方案。然而，现有的FEC并不是针对芯片间通信的挑战性问题及其严重限制而设计的。考虑到这些限制，在本工作中，我们引入了一个新的概念，我们称之为完全平衡编码传输(FBCT)，其中一半链路传输(+1)，另一半链路传输(-1)。虽然FBCT有可能显著降低芯片间通信中的现有噪声，但它也带来了新的挑战。具体地，如所讨论的，FBCT本质上是基于非线性FEC的。因此，我们需要解决一些具有挑战性的问题。首先，非线性码在文献中没有得到广泛的研究。第二，码的平衡特性，即具有相同数目的0和1(调制时为-1和+1)是以前从未考虑过的新约束。优化代码，将信息块映射为码字，以及优化高效地解码代码，这些都是本项目需要应对的挑战。**