Reinventing the tuning and debugging tools for multi-thousand cores computer systems

近年来的顶级超级计算机很大程度上归功于用于通用计算(GPGPU)的图形处理单元(GPU)的数字处理能力。然而，GPGPU也经常用于较小的集群和单个工作站，以执行要求苛刻的任务。即使在移动电话和嵌入式系统中，GPGPU也是完成图像处理等特殊任务的有效媒介。此外，GPGPU处于异质系统架构(HSA)的更广泛趋势的前沿，在HSA中，专门的协处理器用于图形和视频之外的许多任务，如信号处理和网络数据包处理。*这些拥有4000多个内核和算术单元的复杂GPGPU设备的内部架构直到最近才被很好地记录下来。该体系结构在最近几年发生了显著变化，与主处理CPU核心的集成更加紧密，提供共享虚拟内存和用户级队列。问题是，严重缺乏用于调试和调整这些系统的编程工具。拟议研究的目的是为调试、跟踪和分析工具设计新的更有效的算法和软件体系结构，以便它们能够充分应对拥有数千个核心并对可用内存和带宽造成强大压力的硬件体系结构。挑战在几个层面上：确保跟踪和分析工具对所研究的系统施加最小的开销以避免影响其行为，有效地利用所有可用的跟踪和分析硬件辅助，以及有效地将调试、跟踪和分析工具与要监视的操作系统、设备驱动程序和应用程序接口。*这项工作的意义和新颖性在于解决了这类系统的所有用户目前面临的一个严重挑战：拥有合适的工具来高效地调试和调整这些系统上的应用程序。人们普遍认识到，在异类并行处理硬件可用性方面取得了极快的进展，但在软件开发工具方面却没有取得同样的进展。结果，由于难以有效地对这些设备进行编程、调试和调谐，大量用户没有达到使用适当工具所能达到的性能水平，或者根本没有利用这些硬件。因此，拟议的研究计划将产生重大影响，帮助所有复杂计算设备的用户更好地利用可用的硬件。

The top supercomputers in recent years owe much of their power to the number-crunching ability of Graphical Processing Units (GPU) used for General Purpose computation (GPGPU). However, GPGPUs are also frequently used in smaller clusters and individual workstations for demanding tasks. Even in mobile phones and embedded systems, GPGPUs are an efficient medium to accomplish specialised tasks such as image processing. Furthermore, GPGPUs are at the forefront of a wider trend towards heterogeneous system architecture (HSA), where specialised co-procesors are used for a number of tasks beyond graphics and video, such as signal processing and network packet processing.******The internal architecture of these complex GPGPU devices, with over 4000 cores and arithmetic units, was not well documented until recently. The architecture evolved significantly in recent years with a much tighter integration with main processing CPU cores, offering shared virtual memory and user-level queues. The problem is that the programming tools for debugging and tuning these systems are severely lacking. The objective of the proposed research is to devise new more efficient algorithms and software architectures for the debugging, tracing and profiling tools, such that they can adequately cope with hardware architectures boasting thousands of cores and putting a strong pressure on the available memory and bandwidth. The challenges are at several levels: insuring that the tracing and profiling tools impose a minimal overhead on the system studied to avoid affecting its behaviour, efficiently exploiting all the available tracing and profiling hardware assistance, and efficiently interfacing the debugging, tracing and profiling tools to the operating system, device driver and application to be monitored.******The significance and novelty of this work is in addressing a serious challenge currently faced by all users of such systems: having suitable tools to efficiently debug and tune their applications on these systems. It is widely recognised that the extremely rapid advances in heterogeneous parallel processing hardware availability has not been followed by an equivalent progress in the software development tools. As a result, a large number of users are not achieving the level of performance that would be attainable with proper tools, or are simply not taking advantage of such hardware, because of the difficulty in efficiently programming, debugging and tuning these devices. The proposed research program will thus have a significant impact, helping all users of sophisticated computing devices in better exploiting the available hardware.