面向流计算的高能效NoC体系结构研究

随着大数据、边沿计算、深度学习等技术的兴起，数据流动性已成为影响软件算力的关键因素。但现有的片上存储技术和体系结构难以支撑序列化流数据的高速访问，造成"数据流迟滞"和"加速器饥饿"问题并存。为解决此问题，本项目采用新型流存储材料构建专门面向流计算的NoC体系结构，从流数据传输、分布式存储、高性能馈入三个层面强化数据流动性。1）通过引入新型赛道存储器，研究能适应流数据访问特征的NoC路由缓存结构，实现高能效的流数据传输；2）设计面向分布式数据源的一致性存储协议，实施"去中心化"流管理，加速算法演化过程中的数据源查询和切入响应；3）研究由指令驱动的"全局任务图划分策略"和"细粒度涡流调度结构"，为流加速器提供软/硬件结合的高性能数据馈入机制。本项目通过以上问题的研究，构建"材料、结构、算法三者相统一"的高性能片上存储架构，最终实现软件定义的流计算体系结构设计。

Many newly emerging computing techniques, such as big data, edge computing, and deep learning, rely on a high data-liquidity to achieve powerful stream computation. However, current on-chip memory architectures cannot support an efficient way of sequential accessing on streaming-data, causing both sluggish transmission and hungry accelerators. To overcome the issue, this project uses Racetrack Memory (RM), a new kind of on-chip stream memory technique, to build a specific Network-on-chip architecture for stream acceleration. The contributions include fast stream transportation, distributed stream storage, and high performance stream feeding to cores. Firstly, a kind of RM-friendly buffer is designed to remove extra shift operations so that little energy/latency is consumed in access alignments and stream-flow efficiency benefits from a continuously transmit. Secondly, a protocol-based source management is proposed for a coherence data searching with a decentralized stream strategy, which enjoys a fast source locating and steam cutting-over in NoC. Thirdly, an ISA-driven architecture design provides a global mapping for coarse-grained task schedule and a local eddy structure for fine-grained flow routing, which, essentially, follows a SW/HW co-designed pattern to a feeding stream accelerators. With a collaborative design of materials, structure, and algorithm, this project aims to propose and implement a complete software-defined stream architecture to strengthen the data liquidity of distributed stream algorithms.