下一个十年，晶体管要工作在亚10 nm 尺度。现有的基于CMOS的硅基技术，在亚10 nm 尺度上，受到短沟道效应的制约，其速度和功耗难以进一步改进，摩尔定律有失效的可能，需要寻找新的替代方案。我们打算以精确的第一性原理量子输运模拟为工具，在原子尺度上进行理论的先期探索。我们集中在三种主要解决方案以及它们的组合（1） 利用二维材料半导体超薄带来的极好的静电控制能力和表面平整无悬挂键带来的良好的输运特性的优点，使用二维材料半导体作为新的沟道材料。（2）利用高的迁移率特点，使用锗和3-5族半导体作为沟道材料。（3）采用新原理器件：隧穿场效应晶体管（TFET）和 负微分电容场效应晶体管（NCFET）。建立开电流,延迟时间,能耗与材料载流子有效质量，能隙，和能态密度的关系。设计出突破玻尔兹曼极限和现有硅CMOS技术的超低功耗和高性能的晶体管,为下一代晶体管的制备提供可靠的指导。

In the next decade, field effect transistors will work at sub 10 nm scale. However, the speed and power of CMOS-based Si FET are difficult to improve at such a scale due to the short channel effect. Moore's law faces a possibility of failure, and new scheme is highly desired. On the basis of accurate first principles quantum transport simulation, we plan to carry out a theoretical exploration at the atomic scale. We are focused on the three types of schemes and their combination. (1) Using 2D semiconductors as channel because they have excellent electrostatics and dangling-bond free plat surface of two-dimensional semiconductor materials. (2) Using Ge and 3-5 group semiconductors as channel because they have high carrier mobility. (3) New concept FET including tunneling FET (TFET) and negative capacitance FET (NCFET). We will establish the relation between the on state current, delay time, power with the carrier effective mass, band gap, and density of states. We hope design ultra low power and high performance FETs that breakthrough Boltzmann' limit and present Si CMOS technology and provide a reliable guidance for fabrication of next generation transistors.