面向下一代视频应用的超高清格式视频，能够带来卓越的视觉效果，但其极大的数据量对传输带宽和存储造成巨大压力。本课题面向超高清视频应用，开发基于当前最高效视频压缩标准H.265/HEVC的实时编码VLSI硬件电路结构。研究内容从软件算法和VLSI硬件结构两方面共同优化。在算法上优化，研究以硬件结构设计为出发点，提出大幅降低计算复杂度且不明显降低压缩性能的快速算法。在VLSI硬件结构优化，分析算法中的数据依赖性影响，建立高效流水线作业。在系统级上根据不同模块的处理能力，选择合适并行度并规划处理时序安排。设计最终目标将在处理速度上满足超高清视频8K 60fps的实时编码，在压缩性能上接近参考软件，在硬件开销上最大化降低所占资源。本课题的成功研究，在应用方面上可降低视频传输带宽和存储，推进超高清时代到来，具有重大产业价值；在学术方面上研究内容具有研究通用性和可扩展性，可推动视频编码技术的发展和实现。

Ultra-High Definition(UHD) which will be used in next-generation video applications can provide remarkable vision experience. However, its huge video data also bring challenges to the transmission and storage. This project has been focus on the development of the VLSI architecture for a real-time UHD HEVC video encoder. The optimization comes from both the algorithm and hardware design. (1) For the algorithm research, the fast algorithms will be proposed to reduce the high computational complexity of an encoder with negligible coding performance loss. Meanwhile, they need to be friendly to hardware design. (2) For the VLSI design, the data dependency from the algorithms should be analyzed and the high efficiency pipeline can be designed. Considering the different speed of processing modules, the dedicated parallelism and processing schedule should be arranged. The target of this research is to realize the VLSI architecture for UHD 8K 60fps real-time encoding, with a good coding performance and a high hardware utilization. The successful research of this project could solve the problems of the transmission bandwidth and storage for UHD video application. In the meanwhile, it could also benefits for the developing of the video compression techniques.