本项目针对高效高功率密度SiC MOSFET电力电子装置进一步降低器件动态损耗的迫切要求，进行三项创新研究：①建立非线性势垒电容感生瞬态电荷调控的动态损耗模型，揭示漏源电容、栅漏电容、负载电流引入的瞬态电荷在开关过程的输运机理以及瞬态电荷在输运路径中隶属于器件非线性电阻产生焦耳热为动态损耗实质。②基于器件损耗-瞬态电荷-频率内在耦合规律，提出多器件损耗快速评估法及其准确性因子，对多个单极输运器件在不同工作频率下均适用。③提出非线性势垒电容感生电荷调控型新结构，通过分裂栅和P+屏蔽层结构调控漏源/栅漏电容感生电荷数量和导通电阻，实现不同工作频率下的最优动态损耗设计。本课题是一项关于SiC单极型器件新模型、新方法和新结构的应用基础研究，为SiC MOSFET降低动态损耗和损耗快速评估提供了新的思路和方法。

In this project, three innovative studies with further reducing the dynamic loss of power devices are conducted to meet the urgent requirements of high-efficiency and high-power-density SiC MOSFET power electronics. ① A dynamic loss model is established under non-linear barrier capacitance induced transient charge control, which reveals the transport mechanism of charge introduced by the drain-source capacitor, gate-drain capacitor, and the load current during switching process. The model is based on the dynamic loss of Joule heat generated by transient charge flow through non-linear resistance of the device in the transport path. ② Based on the device loss-transient charge-frequency intrinsic coupling law, a multi-device loss rapid evaluation methodology and its accuracy factor are proposed, which are applicable to multiple unipolar devices at different operating frequencies. ③ A non-linear barrier capacitance induced charge regulation type SiC MOSFET is proposed. The split gate and P+ shield layer can regulate the drain-source capacitance, gate-drain capacitance induced charge quantity and Ron, to achieve the optimal dynamic loss design and minimum loss at different operating frequencies. This topic is about the application-oriented basic research through the new model, new method, and new structure, and also provides new theoretical guidance to how to reduce dynamic losses and rapid loss evaluation of SiC MOSFETs.