Logic Obfuscation against IC Reverse Engineering Attacks Using PLGs

Logic Obfuscation against IC Reverse Engineering Attacks Using PLGs
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使用 PLG 对抗 IC 逆向工程攻击的逻辑混淆

DOI:
10.1109/iccd.2017.59
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发表时间:
2017
期刊:
2017 IEEE International Conference on Computer Design (ICCD)
影响因子:
--
通讯作者:
Jiann
Jiann
中科院分区:
--
文献类型:
--
作者:
Qutaiba Alasad;Jiann

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可以利用强逻辑锁定方法来对抗IC上的严重威胁。然而,最近的布尔可满足性(SAT)攻击成功地解密所有现有的逻辑锁定技术。尽管已经使用了不同的方法来使攻击执行时间呈指数增长,但这些方法容易受到跟踪和移除的弹性SAT结构攻击。在这项工作中,我们使用硅纳米线场效应晶体管来产生一个混淆的IC对逆向工程攻击,并通过交换一些逻辑门与不同的多态门基于硅纳米线场效应晶体管,并纳入一个小块的电路,其输出是不可追踪的,以减少性能损失。
A strong logic locking approach could be utilized to contest serious threats on ICs. However, recent Boolean satisfiability (SAT) attack successfully decrypts all existing logic locking techniques. Even though different methods have been used to make the attack execution time increase exponentially, those methods are vulnerable to tracked and removed resilient SAT structure based attacks. In this work, we use silicon nanowire FETs to produce an obfuscated IC against reverse engineering attacks and reduce the performance penalty by exchanging some logic gates with different polymorphic gates based SiNW FETs and incorporating a small block of circuitry whose output is untraceable.
DOI: 10.1145/3060403.3060469
发表时间: 2017-05
期刊: Proceedings of the Great Lakes Symposium on VLSI 2017
影响因子: --
作者:
Yuanqi Shen;H. Zhou
通讯作者: Yuanqi Shen;H. Zhou