Logic Obfuscation against IC Reverse Engineering Attacks Using PLGs
Logic Obfuscation against IC Reverse Engineering Attacks Using PLGs
复制标题
使用 PLG 对抗 IC 逆向工程攻击的逻辑混淆
DOI:
10.1109/iccd.2017.59
复制
发表时间:
2017
期刊:
影响因子:
--
通讯作者:
Jiann
中科院分区:
文献类型:
--
作者:
Qutaiba Alasad;Jiann
A strong logic locking approach could be utilized to contest serious threats on ICs. However, recent Boolean satisfiability (SAT) attack successfully decrypts all existing logic locking techniques. Even though different methods have been used to make the attack execution time increase exponentially, those methods are vulnerable to tracked and removed resilient SAT structure based attacks. In this work, we use silicon nanowire FETs to produce an obfuscated IC against reverse engineering attacks and reduce the performance penalty by exchanging some logic gates with different polymorphic gates based SiNW FETs and incorporating a small block of circuitry whose output is untraceable.
DOI:
10.1145/3060403.3060469
发表时间:
2017-05
期刊:
Proceedings of the Great Lakes Symposium on VLSI 2017
影响因子:
--
作者:
Yuanqi Shen;H. Zhou
通讯作者:
Yuanqi Shen;H. Zhou