Chip Multithreaded Consistency Model
Chip Multithreaded Consistency Model
复制标题
芯片多线程一致性模型
DOI:
10.1007/s11390-008-9132-0
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发表时间:
2008-03
影响因子:
0.7
通讯作者:
中科院分区:
文献类型:
--
作者:
Multithreaded technique is the developing trend of high performance processor. Memory consistency model is essential to the correctness, performance and complexity of multithreaded processor. The chip multithreaded consistency model adapting to multithreaded processor is proposed in this paper. The restriction imposed on memory event ordering by chip multithreaded consistency is presented and formalized. With the idea of critical cycle built by Wei-Wu Hu, we prove that the proposed chip multithreaded consistency model satisfies the criterion of correct execution of sequential consistency model. Chip multithreaded consistency model provides a way of achieving high performance compared with sequential consistency model and ensures the compatibility of software that the execution result in multithreaded processor is the same as the execution result in uniprocessor. The implementation strategy of chip multithreaded consistency model in Godson-2 SMT processor is also proposed. Godson-2 SMT processor supports chip multithreaded consistency model correctly by exception scheme based on the sequential memory access queue of each thread.
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DOI:
10.1109/iccd.2006.4380860
发表时间:
2006-10
期刊:
2006 International Conference on Computer Design
影响因子:
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发表时间:
2002
期刊:
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影响因子:
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DOI:
10.1109/cmpcon.1993.289730
发表时间:
1993-03
期刊:
Digest of Papers. Compcon Spring
影响因子:
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通讯作者:
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DOI:
10.1093/comjnl/45.3.320
发表时间:
2002
期刊:
Comput. J.
影响因子:
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作者:
T. Ungerer;B. Robic;J. Silc
通讯作者:
T. Ungerer;B. Robic;J. Silc