Selecting Representative Critical Paths for Sensor Placement Provides Early FPGA Aging Information
Selecting Representative Critical Paths for Sensor Placement Provides Early FPGA Aging Information
复制标题
选择传感器放置的代表性关键路径可提供早期 FPGA 老化信息
DOI:
10.1109/tcad.2019.2953174
复制
发表时间:
2020
影响因子:
2.9
通讯作者:
Z. Navabi
中科院分区:
文献类型:
--
作者:
Mohammad Ebrahimi;Z. Navabi
This article proposes a methodology for critical path selection and delay sensor insertion for aging monitoring in field-programmable gate arrays (FPGAs). The aging information can be used to reconfigure FPGAs to achieve better performance or wear leveling. To filter out the paths aging less aggressively, our methodology decides based on both physical-level parameters [e.g., path delay, process variation, temperature, static stress (duty cycle), and dynamic stress (switching activity) as well as aging-relevant parameters (e.g., fan-out, and endpoint physical location)]. After selection of an optimal set of paths, age sensors, introduced in our earlier work, are placed in a distributed fashion throughout the FPGA area to provide aging information of its various parts as they are being used. Accurate aging models for FPGAs are required to determine the contribution of the above-mentioned parameters in aging. In this article, ASICs’ aging models are adapted for FPGAs through measurement-based fitting approach. The experimental results using various benchmarks reveal that our algorithm selects paths with a minimum error.
DOI:
10.1109/tcad.2017.2778254
发表时间:
2018-10
影响因子:
2.9
作者:
Arunkumar Vijayan;S. Kiamehr;Fabian Oboril;K. Chakrabarty;M. Tahoori
通讯作者:
Arunkumar Vijayan;S. Kiamehr;Fabian Oboril;K. Chakrabarty;M. Tahoori
DOI:
10.1109/tcad.2016.2620903
发表时间:
2017
影响因子:
2.9
作者:
A. Vijayan;A. Koneru;S. Kiamehr;K. Chakrabarty;M.B. Tahoori
通讯作者:
M.B. Tahoori