A Laboratory Oriented Approach to Undergraduate Analog CMOS VLSI Design Instruction

超大规模集成电路（VLSI）设计教育 数字电路已经到了一个阶段， 美国大学的学生通常能够 成功设计出复杂的电路 教育 这组学习模拟VLSI设计原理的学生， 由于各种因素，如 模拟设计过程中涉及的额外自由度。 模拟超大规模集成电路设计复杂度的增加， 干扰设计测试循环的闭合， 数字VLSI教育过程的重要组成部分。 这 项目提供了一种方法，以提供关闭此设计测试 模拟VLSI设计中的环路，为教育工作者提供一个实验室 风格的指导手册，并附有超大规模集成电路芯片组 涵盖了模拟设计中的许多重要主题。 这 模拟CMOS超大规模集成电路设计资源套件将允许微系统 教育工作者能够涵盖重要的模拟设计概念 然后立即分配实验作业 基于这种材料。 包括芯片组的资源套件， 将被设计为完全可以通过互联网访问。 的 芯片组将被设计成使得制造可以由 NSF支持的制造服务MOSIS。 传播 资源包将由马萨诸塞州 微电子中心。

Education in the design of very large scale integrated (VLSI) digital circuits has reached a stage where undergraduate students in U.S. universities are routinely able to successfully design sophisticated circuits. The education of this same group of students in analog VLSI design principles is not at the same level of maturity due to factors such as the extra degrees of freedom involved in the analog design process. The increased complexity of analog VLSI design seriously interferes with the closure of the design test loop that is an important part of the digital VLSI educational process. This project offers a means to provide closure to this design-test loop in analog VLSI design by providing educators a laboratory style tutorial manual with accompanying VLSI circuit chip set that covers many important topics in analog design. This Analog CMOS VLSI Design Resource Kit will allow microsystems educators the ability to cover important analog design concepts in lecture and then immediately assign laboratory assignments based on this material. The resource kit, including chip set, will be designed to be completely accessible via INTERNET. The chip set will be designed so that fabrication may be handled by the NSF-supported fabrication service MOSIS. Dissemination of the resource kit will be aided by the Massachusetts Microelectronics Center.