Architectural Co-Synthesis for High-Performance Distributed Embedded Systems

嵌入式计算系统的设计必须满足硬、软、性能、成本等方面的限制。本研究研究了由多个处理器构建的嵌入式系统的综合，这些处理器可能是连接在网络中的商业或特定应用的集成电路。这种方法，协同综合，旨在同时设计一个系统的硬件和软件架构。通过迭代分布式计算引擎的硬件架构和应用软件的进程架构来满足所有约束的算法正在研究中。研究的模型是任务图和分布式系统图。基于硬件和软件的同时设计、对任务图中进程的更强假设，以及协同合成过程中进程的同时调度、分配和分区，这些都得到了扩展。数学优化方法，如图划分和网络流，被用来生成有效的设计算法。

Embedded computing systems must be designed to meet hard, soft, performance, cost and other constraints. This research studies the synthesis of embedded systems built from multiple processors, which may be commercial or application-specific ICs connected in a network. This methodology, co-synthesis, aims to simultaneously design the hardware and software architectures of a system. Algorithms for meeting all constraints through iteration of both the hardware architecture of the distributed computing engine and the process architecture of the application software are being investigated. The model for the research is the task graph and distributed system graph. These are being extended based on simultaneous design the hardware and software, stronger assumptions about processes in the task graph, and simultaneous scheduling, allocation, and partitioning of processes during co-synthesis. Mathematical optimization methods, such as graph partitioning and network flow, are being used to generate effective design algorithms.