An Experimentally-Designed Video Signal Processor Architecture

这个项目是设计一个视频信号处理的体系结构和编译器，由计算机体系结构、编译器和信号处理方面的研究人员合作。该体系结构是专用于应用程序的非常长的指令字机，这意味着使用了大量的小数据路径。地址生成可以得到硬件支持。该编译器在几个方面与通用编译器不同：即使以高编译时间为代价也要寻求优化，并且将显式优化内存使用。架构和编译器设计正在通过应用程序代码的实验进行评估，包括视频压缩、图像增强和机器视觉。该体系结构在高性能工作站网络上进行模拟，而编译器是基于Gnu C编译器构建的。体系结构和编译器将不断改进，以形成一个高性能的系统和一套设计原则。

This project is designing an architecture and compiler for video signal processing, with collaboration among researchers in computer architecture, compilers, and signal processing. The architecture is a very long instruction word machine dedicated to the applications, which means that a large number of small data paths are used. Address generation may receive hardware support. The compiler differs in several ways from general purpose compilers: optimization is sought even at the cost of high compilation times, and memory usage will be explicitly optimized. Architecture and compiler design are being evaluated by experimentation with application codes, including video compression, image enhancement, and machine vision. The architecture is being simulated on a network of high-performance workstations, while the compiler is being constructed based on the Gnu C compiler. The architecture and compiler will be iteratively improved to result in a high- performance system and a set of design principles.