CISE Research Instrumentation: Research in Parallel Computer System Design using Workstation Clusters with High-Speed Networks

Psarris, Kleanthis Das, Samir， R. Boppana, Rajendra， V.德克萨斯大学圣安东尼奥分校利用高速网络的工作站集群进行并行计算机系统设计研究该合同是为了获得一个由四个多处理器工作站组成的集群，以支持几个研究项目。包括分布式共享内存多处理器的体系结构和编译器的设计，以及并行离散事件模拟器的设计和实现等大规模应用的研究。所提出的仪器提供了一个多粒度并行和分布式计算平台，其中紧密耦合和松散耦合系统并存。它通过基于高速网络的SCI（可扩展的相干接口）将四个Sun工作站互连起来。SCI互连将提供低延迟消息传递和共享内存支持。带有Solaris操作系统的SUN工作站支持线程和高精度时钟。低延迟的工作站间通信和线程将用于实现并行架构模拟器和并行离散事件模拟器。精确的时钟将用于从应用程序中提取消息通信和共享内存跟踪。这些轨迹将依次用于通过模拟来评估新的体系结构机制。互连提供的共享内存支持将用于运行并行编译器生成的并行代码。将在设备上编译和运行几个基准应用程序，以评估各种依赖性分析技术的有效性。

CDA-9529541 Psarris, Kleanthis Das, Samir, R. Boppana, Rajendra, V. The University of Texas at San Antonio Research in Parallel Computer Systems Design using Workstation Clusters with High-Speed Networks This award is for the acquisition of a cluster of four multiprocessor workstations to support several research projects, including the research on the design of architectures and compilers for distributed shared memory multiprocessors and on large-scale applications such as the design and implementation of parallel discrete event simulators. The proposed instrumentation provides a multi-granular parallel and distributed computing platform, where both tightly-coupled and loosely-coupled systems coexist. It interconnects four Sun workstations with an SCI (scalable coherent interface) based high-speed network. The SCI interconnect will provide low-latency message passing and shared memory support. The SUN workstations with Solaris OS support threads and high precision clocks. The low-latency inter-workstation communication and threads will be used to implement parallel architecture simulators and parallel discrete event simulators. Precise clocks will be used to extract message communication and shared memory traces from applications. These traces in turn will be used to evaluate the new architectural mechanisms through simulations. The shared memory support provided by the interconnect will be used to run the parallel code generated by a parallelizing compiler. Several benchmark applications will be compiled and run on the equipment to evaluate the effectiveness of various dependence analysis techniques.