Diffusion Time Resolved Ion Micro Beam Induced Charge Collection in Integrated Circuits

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As semiconductor technology strives for higher circuit densities, higher bandwidths, and lower power requirements, circuit elements have a higher susceptibility to ionizing radiation. Since the discovery that spallation neutrons from cosmic rays and alpha particles from chip packaging materials produce electronic upsets, extensive design efforts have been undertaken to make electronic devices less sensitive to ionizing radiation. Immunity to "soft errors" or Single Event Upsets (SEU) is listed as a requirement in the 1997 National Technology Roadmap for Semiconductors prepared by the Semiconductor Industry Association in the U.S. The aim of this research project is to undertake extensive experimental, theoretical modeling, and computer simulation studies of the physical processes underlying Single Event Upset (SEU) phenomena in prototype advanced IC devices. All of the pieces are in place at the University of North Texas (UNT) to accomplish the proposed research including (1) the completion of the focused, scanning, heavy-ion microprobe, (2) establishment of an extensive user's facility, and (3) identification of an industrial partner that has made a commitment to the charge diffusion and collection measurements and simulation research.