Modeling of Unified Channel Mobility for Quantum Hydrodynamic Simulation of Nanoscale MOSFETs

CMOS工艺正从180 nm节点向130 nm节点迈进。对于100纳米-13纳米一代技术，必须重新审视晶体管设计的许多关键问题。其中之一是非平衡输运，发生在nonoscale MOS器件。由于器件尺寸的不断缩小，栅长已经接近或小于非弹性平均自由程，在这种情况下，MOS器件中载流子的非平衡/非局域输运与传统的输运有很大不同，本文提出了一个统一的体SOI、薄体SOI沟道载流子迁移率模型，和适用于100 nm以下的栅极长度的DG MOSFET。基于包括量子效应的非平衡输运的合理物理，通过寻求表征器件中发生的非局域输运的有效平均载流子能量，将传统的低场反型层迁移率扩展到高场区。一系列的自洽Monte Carlo（MC）模拟的载流子在反型层与量子力学校正的潜力将进行在该地区包括延迟，低，高场。一个统一的沟道迁移率将被构造在这样一种方式，它可以准确地预测在沟道的漏端的速度过冲，在反型层中的量子化效应，包括隧穿，以及跨源极-沟道势垒的电子发射限制电流密度。然后将这种统一的沟道迁移率纳入量子流体动力学（QHD）输运方程中，用于纳米尺度体、SOI、薄体SOI和DG MOSFETs的数值模拟，预计这项研究将提供一种一致且简单的方法，通过流体动力学（HD）公式将模拟层次从漂移扩散移动到MC Boltzmann。该项目将能够模拟沟道长度为100 nm及以下的MOS器件。这种能力是下一代集成电路仿真所需要的，预计在几年内。拟议的研究也将有利于研究生和本科生在校园和工业工程师谁采取P.I.的器件仿真课程进行远程教学。私家侦探根据过去NSF项目的研究成果和业界支持的其他研究项目，不断更新课程材料。

The CMOS technology is now being ushered from l8Onm node to 13Onm node. For lOOnm-l3Onm generation technology, many key issues of transistor design must be reexamined. One of them is non-equilibrium transport which takes place in nonoscale MOS devices. Because of continuous down-scaling of the device, the gate length now becomes comparable to or smaller than the inelastic mean-free-path. In this regime, the non-equilibrium /non-local transport of carriers in MOS devices requires substantially different formulation from that of the conventional one.In this research project, it is proposed to construct a unified mobility model for carriers in the channel of bulk, SOI, thin-body SOI, and DG MOSFETs applicable to gate length below lOOnm. Based on sound physics of non-equilibrium transport including quantum effects, the conventional low-field inversion layer mobility will be extended to the high-field regime by seeking an effective average carrier energy which characterizes the non-local transport occurring in the device. A series of self-consistent Monte Carlo (MC) simulations of carriers in inversion layers with a quantum mechanically corrected potential will be carried out in the region encompassing retarding-, low-, and high-fields. A unified channel mobility will be constructed in such a way that it can accurately predict velocity overshoot at the drain end of the channel, quantization effects in the inversion layer including tunneling, as well as thermionic emission-limited current density across the source-channel barrier. This unified channel mobility will then be incorporated in the quantum hydrodynamic (QHD) transport equations for numerical simulation of nanometer-scale bulk, SOI, thin-body SOI, and DG MOSFETs.It is expected that this research will provide a consistent and easy means of moving the simulation hierachy from drift-diffusion to MC Boltzmann via a hydrodynamic (HD) formulation. The project will enable simulation of MOS devices with the channel length of 100nm and below. Such capability is required of simulation of next generation of integrated circuits, which are expected in a few years.The proposed research will also benefit both graduate and undergraduate students on campus and engineers in industry who take P.I.'s device simulation course through the distance learning. The P.I. has constantly updated course materials based on research results of the past NSF projects and other research projects supported by the industry.