Research for Mixed Signal Electronic Technologies: A Joint Initiative Between NSF and SRC: Scalable Design and Test Methods for Single-Chip Multi-Link Radio-Frequency Transceivers

混合信号系统的最新发展，特别是那些在片上系统中集成计算和通信的系统，集中在通过无线设备和网络进行信息通信的目标上。随着处理基带信息的数字系统设计进入低千兆赫兹(GHz)频率范围，混合信号收发机必须在不久的将来以更高的频率工作在ISM频段(2.5 GHz到5.8 GHz)，以满足带宽需求。模拟设计的进步已经产生了几种高达5 GHz的收发机设计，使用了CMOS、BiCMOS和其他技术。为了减少噪音，这些设计往往将发送器和接收器分开，到目前为止，在无线设备中只提供了单个物理链路(一个发送器和一个接收器)。在设计方面，该方案致力于创建和验证可扩展的系统化设计方法，以将两个或多个物理链路集成到一个芯片上，以在通信应用中提供更多的带宽和灵活性。结合多链接的方法在某种意义上是可扩展的，即可以根据应用需求添加更多链接。为了建立这种方法，我们提出了以下设计方法：1.处理数字开关噪声的噪声消除技术和电路。噪声消除技术和电路，用于处理不同收发信机链路和电路之间的射频噪声干扰。这些电路将使用与我们密切合作的行业的案例研究进行验证：德州仪器、摩托罗拉和国家半导体，他们将为本研究提供先进的制造技术和模拟模型。设计将得到全面测试，可扩展测试方法的开发是本提案的第二个重点。尽管混合信号测试活动激烈，但进展相当缓慢，特别是在高频(GHz)测试方面。我们建议研究以下方法，并将结果提炼成一种测试方法，该方法可以根据工作频率和工艺进步进行调整：1.在同一芯片上使用一条发送链路和一条接收链路的端到端数字测试方法，以验证信息传输的正确性。设计了与收发信机工作频率相同的片上延时和相位测量电路。ATE和片上测试电路之间的接口，以有效地使用测试资源。在验证这些测试方法期间，我们需要访问先进的测试设备以进行比较，这些设备将由我们在Teradyne(Tualatin，OR)和Wavecrest(加利福尼亚州圣何塞)的合作者提供。另一个集成级别涉及拟议工作的课程研究方面，这正在我们当前的课程修订中实施。传播方法重复使用了由NSF、FIPSE和我们自己的大学支持的远程学习方法和评估。该提案将提供基本的方法和技术，并培训第一代系统架构师进行高频混合信号设计和测试。

Recent developments in mixed-signal systems, especially those integrating computing andcommunication in a system-on-a-chip, have focused on the goal to communicate information via wireless devices and networks. While digital system design to process baseband information is moving into the low gigahertz (GHz) frequency range, the mixed-signal transceivers have to operate in the ISM bands (2.5 GHz up to 5.8 GHz) with even higher frequencies in the near future to satisfy bandwidth demands. Analog design advances have produced several transceiver designs up to 5 GHz, using CMOS, BiCMOS, and other technologies. To reduce noise, these designs tend to separate the transmitter and receiver, and so far, have provided only a single physical link (one transmitter and one receiver) in a wireless device. In the design area, this proposal addresses the creation and verification of scalable systematic design methods to integrate two or more physical links on one single chip to provide more bandwidth and flexibility in communication applications. A methodology to incorporate multi-links is scalable in the sense that more links can be added by application demands. To create this methodology, we propose the following design approaches:1. Noise cancellation techniques and circuits to deal with digital switching noise.2. Noise cancellation techniques and circuits to deal with RF noise interference between different transceiver links and circuits.These circuits will be validated using case studies from industry with whom we have had closecollaborations: Texas Instruments, Motorola, and National Semiconductors, who will provideadvanced fabrication technologies and simulation models for this study.The designs will be fully tested and the development of scalable test methods is the second focus of this proposal. Mixed-signal test advances, despite intense activities, have been rather slow, especially in high-frequency (GHz) test. We propose to investigate the following approaches and distill the results into a test methodology that can be scaled with respect to operating frequencies and process advances:1. End-to-end digital test methods using one transmit link and one receive link on the same chipto verify correct information transmission.2. Designs of on-chip delay and phase measurement circuits, operating at the same frequency asthe transceivers.3. Interface between ATE and on-chip test circuits to use test resources efficiently.During the validation of these test methodologies, we will need access to advance test equipment for comparison purposes, and these equipment will be provided by our collaborator at Teradyne (Tualatin, OR) and Wavecrest (San Jose, CA).Another level of integration involves the curriculum - research aspects of the proposed work,which is being implemented in our current curriculum revision. Dissemination approaches re-used the distance learning methods and assessment supported by NSF, FIPSE, and our ownuniversity. The proposal will deliver fundamental methodologies and techniques, and train thefirst-generation system architects in high-frequency mixed-signal design and test.