SBIR Phase I: Next Generation Binary Decision Diagrams (BDD)-Based Logic Optimization System

这个小企业创新研究第一阶段项目解决了在很短的时间内合成非常大的硅芯片设计的需求。目前可用的商业合成工具基于主要是代数的方法、数据结构和算法（与更有效的布尔方法相反），其特点是运行时间慢，设计质量不高。这个SBIR项目致力于开发基于现代BDD数据结构的逻辑合成的有效算法和技术。算法的核心是一种新的BDD分解理论，最近由公司研究人员开发。由此产生的商业产品是一个非常快速，高性能逻辑合成的软件解决方案；正如最初的实验所表明的那样，它将至少比目前市场上可用的软件工具快一个数量级。该产品的主要版本是用于几种应用程序的逻辑合成的核心引擎：asic，微处理器和fpga。该工具的另一个版本将针对形式验证，它也依赖于快速逻辑优化。该逻辑优化引擎可以插入到现有的EDA软件供应商提供的客户使用的任何现有的合成流中。SBIR第一阶段项目将刺激设计自动化的研究，并为EDA行业注入急需的创新。这项工作将最终开发出下一代高性能逻辑综合系统，这将对EDA工具市场产生重大的商业影响。这项活动也将产生重要的教育影响。它将教育新一代的设计工程师和学生，让他们接触到这个项目开创的新的设计方法和创新。

This Small Business Innovation Research Phase I project addresses the need to synthesize very large silicon chips designs in very short time. Currently available commercial synthesis tools are based on the methodology, data structures, and algorithms that are predominantly algebraic (as opposed to more efficient Boolean methods), and are characterized by slow run time and inadequate design quality. This SBIR project is devoted to the development of efficient algorithms and techniques for logic synthesis based on modern BDD data structures. At the heart of the algorithms is a novel BDD decomposition theory, recently developed by company researchers. The resulting commercial product is a software solution for very fast, high-performance logic synthesis; as indicated by initial experiments it will be at least an order of magnitude faster than software tools available on the market today. The main version of the product is a core engine for logic synthesis used in several classes of applications: ASICs, microprocessors, and FPGAs. Another version of the tool will target formal verification, which also relies on fast logic optimization. The logic optimization engine can be plugged into any existing synthesis flow utilized by customers and offered by the existing EDA software vendors The SBIR Phase I project will stimulate research in design automation and inject much needed innovation in the EDA industry. This work will culminate in the development of a next generation, high-performance logic synthesis system that will have a significant commercial impact on the EDA tools market. This activity will also have important educational impact. It will educate a new generation of design engineers and students by exposing them to new design methodologies and innovations pioneered by this project.