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CAREER: Bridging the Technology-EDA Gap through Strategic Tools for Robust Nanometer Design

CAREER: Bridging the Technology-EDA Gap through Strategic Tools for Robust Nanometer Design
职业:通过稳健纳米设计的战略工具弥合技术与 EDA 差距
批准号:
0546054
负责人:
Yu Cao
金额:
$0.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2006
资助国家:
美国
项目状态:
已结题
起止时间:
2006-08-15 至 2011-07-31

项目摘要

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中文摘要
翻译
制造差异、环境不确定性和可靠性降级的指数增长极大地影响了纳米级集成系统的方方面面。这些新出现的物理效应导致了过多的性能变化,并使当前的集成电路设计方法失效。为了克服这些挑战并继续沿着摩尔定律预测的道路前进,需要从根本上改变设计范式,将纳米技术特性、集成电路设计和先进的电子设计自动化(EDA)策略无缝集成在一起。该项目旨在开发一套全面的预测设计工具,以分析和减少在存在多种不确定因素的情况下电路性能的变异性。这些设计工具包括可变性模型、统计分析和并行优化方法,以提高从计算到消费电子等各种类型的未来纳米级系统的设计可预测性和可靠性。此外,还将开发一个层次框架,用于在各种可变性和可靠性约束下对系统性能进行统计预测。该框架允许设计人员识别关键的设计需求,评估重要的设计权衡,并自适应地提前做出设计决策。该项目的研究工作促进了纳米电路的稳健设计,并加强了对不可靠元件的可靠设计的基本理解,包括纳米级互补金属氧化物半导体(CMOS)和未来的新兴技术。该项目的教育部分通过新颖的教育课程和网络传播工具,将新开发的设计知识传授给不同的学生群体。基本的设计概念将在为K-12教师开设的暑期课程中讲授,授课水平将为教师所理解,更重要的是,他们的学生能够激发他们对工程的初步兴趣。
英文摘要
The exponential rise of manufacturing variations, environmental uncertainties, and reliability degradations dramatically influences all aspects of a nanoscale integrated system. These emerging physical effects lead to an excessive amount of performance variability and invalidate current integrated circuit design ethodologies. To overcome these challenges and continue along the path predicted by Moore's law, a fundamental shift in the design paradigm is needed to seamlessly integrate nanometer technology properties, integrated circuit design, and advanced electronic design automation (EDA) strategies. This project aims to develop a comprehensive suite of predictive design tools to analyze and mitigate circuit performance variability in the presence of multiple sources of uncertainties. These design tools comprise variability models, statistical analysis, and concurrent optimization methods to improve design predictability and reliability for future nanoscale systems of all types, from computation to consumer electronics. In addition, a hierarchical framework will be developed to statistically predict system performance under various variability and reliability constraints. This framework allows designers to identify key design needs, evaluate important design tradeoffs, and adaptively make design decisions up front. Research efforts in this project facilitate the robust design of nanometer circuits and enhance the fundamental understanding of reliable design with unreliable components, including both nanoscale complementary-metal-oxide-semiconductors (CMOS) and future emerging technologies. The education component of this project transfers the newly developed design knowledge to a diverse population of students, through novel education curricula and web-based dissemination tools. The basic design concepts will be taught in a summer course for K-12 teachers, at a level that can be appreciated by the teachers and, more importantly, by their students to stimulate an initial interest in engineering.
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会议论文
Collaborative Research: SHF: Medium: Tiny Chiplets for Big AI: A Reconfigurable-On-Package System
SHF: Small: Efficient and Accurate Learning with Low-Precision Components: A Cortex-Inspired Approach
  • 批准号:
    1715443
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2017
  • 负责人:
    Yu Cao
  • 依托单位:
SHF: Conference: Hardware and Algorithms for Learning On-a-chip; November 5, 2015; Austin, TX
  • 批准号:
    1545974
  • 项目类别:
    Standard Grant
  • 资助金额:
    $1.5万
  • 财政年份:
    2015
  • 负责人:
    Yu Cao
  • 依托单位:
REU SITE: Research on Biomedical Informatics
  • 批准号:
    1415477
  • 项目类别:
    Standard Grant
  • 资助金额:
    $17.14万
  • 财政年份:
    2013
  • 负责人:
    Yu Cao
  • 依托单位:
海外基金