SBIR Phase I: VCSELs On Silicon: CMOS Compatible Epitaxial Mesas On Large Silicon Wafers

这个小型企业创新研究(SBIR)第一阶段项目计划开发一种革命性的、简单且设计良好的技术，用于在大型(300 Mm)硅晶片上低成本地沉积化合物半导体外延材料台面阵列。后续的工艺步骤与硅CMOS(互补金属氧化物半导体)工艺顺利集成，类似于当前的SiGe(硅锗)BiCMOS(双极CMOS)工艺。以前尝试将III-V材料与硅进行集成的成功有限，原因包括成本高、与CMOS不兼容、晶片尺寸小以及缺乏技术和市场准备。相比之下，所提出的解决方案是非常经济有效的，它建立在先进材料沉积和处理方面的最新技术进步的基础上。选择在硅上制造高速垂直腔面发射激光器(VCSEL)阵列来演示该技术。最直接的应用是计算机系统和包括下一代USB(通用串行总线)电缆在内的外围设备的高速互连。该项目更广泛的影响/商业潜力在于：该技术可以将先进的化合物半导体材料与硅IC的优越工艺和效率相结合。这将结束多年的孤立开发，并将为主流硅加工带来新的电子和光电设备能力。在电子应用中，基于InP和GaN器件技术的高速大功率晶体管将在大片硅片上进行硅CMOS加工。这将把先进的模拟和电源功能与基于硅CMOS的控制和处理集成在一起。此外，它还将为硅集成电路的性能持续增强提供一条替代路线，而不依赖于特征尺寸的缩小。在光电子学中，基于GaAs和InP的光发射器和接收器在硅上的集成将允许光发射器和接收器模块的小型化和降低成本。光学和电子功能在硅片上的无缝集成将导致更快的互连，并将显著降低光纤信号传输的每比特成本。

This Small Business Innovation Research (SBIR) Phase I project proposes todevelop a revolutionary, yet simple and well-designed technique for the cost effectivedeposition of compound semiconductor epitaxial material mesa arrays on large (300mm)silicon wafers. The subsequent processing steps integrate smoothly with silicon CMOS(Complementary Metal-Oxide-Semiconductor) processing similar to the current SiGe(Silicon Germanium) BiCMOS (Bipolar CMOS) technology. Previous attempts at theintegration of III-V materials with silicon have had limited success due to many factorsincluding high cost, CMOS incompatibility, small wafer size, and a lack of technologicaland market readiness. In contrast, the proposed solution is very cost effective, and itbuilds on recent technological progress in advanced materials deposition and handling.The vehicle chosen for the demonstration of this technology is the fabrication of highspeed VCSEL (Vertical Cavity Surface Emitting Laser) arrays on silicon. The immediateapplication is in high speed interconnects for computer systems and peripherals includingnext generation USB (Universal Serial Bus) cables.The broader impact/commercial potential of this project lies in the followingaspects: This technology can merge the advanced compound semiconductor materialswith the superior processing and efficiency of silicon ICs. This will end years of isolateddevelopment and will bring new electronic and optoelectronic device capabilities tomainstream silicon processing. In electronics applications, high speed and high powertransistors based on InP, and GaN device technologies will be processed with siliconCMOS on large wafers. This will integrate advanced analog and power functions withsilicon CMOS based control and processing. In addition, it will offer an alternative routefor the continuation of performance enhancement in silicon ICs independent of featuresize reduction. In optoelectronics, the integration of GaAs and InP based optical emittersand receivers on silicon will allow the miniaturization and cost reduction of opticaltransmitter and receiver modules. The seamless integration of optical and electronicfunctions on silicon chips will lead to faster interconnects and will significantly reducethe cost per bit in fiber optic signal transmission.