CAREER: Towards the Future of Reliable and Scalable Nanoelectronic Systems

未来以奈米电晶体为基础的系统，将显著提升资讯收集与处理能力。然而，可靠性和可伸缩性方面的挑战要求在系统级方法中进行转换。纳米级晶体管的一些基本假设将发生变化：由于纳米级自组装的随机性，制造过程将存在高度缺陷；由于纳米级晶体管极易受到间歇性故障的影响，因此无法在现场保证系统的可靠性；系统可扩展性要求组件之间的互连严格本地化。本研究旨在形成一个构建可靠和可扩展纳米系统的新范例，这将开辟新的应用领域，目前受到尺寸和功率的限制。本文主要研究未来纳米系统的三个生命周期阶段：(1)通过芯片重构来处理制造过程中发现的缺陷；(2)在严格的局部互连约束下，采用内置冗余元件处理现场动态故障。这两个阶段的方法和分析将为(3)系统设计阶段提供指导。这个职业项目包括一个强大的教育组成部分，让本科生参加一些竞赛项目，以获得研究经验。研究生也会参加这些项目，学习如何将研究成果传达给普通受众。这种综合研究和教育努力旨在弥合最先进的研究和工程方法教学之间的差距，许多不同的EE， CE和CS知识体系，以及学术界系统研究和设备研究之间的差距。

Future systems based on nanoscale transistors will offer significant boosts in information gathering and processing capabilities. However, the reliability and scalability challenges mandate a transformation in the system-level approaches. A number of fundamental assumptions will change with nanoscale transistors: the fabrication processes will be highly defective due to the random nature of nanoscale self-assembly; system reliability cannot be guaranteed in the field because nanoscale transistors are extremely susceptible to intermittent faults; system scalability demands the interconnection between components to be strictly localized. This research aims at forming a new paradigm to construct reliable and scalable nanosystems, which will open up new application domains currently held back by the size and power limit. This research focuses on three life-span stages of future nanosystems: (1) defects discovered during manufacturing are treated through chip reconfiguration; (2) dynamic faults are treated in the field with built-in redundant elements under the strict constraint of local interconnections. The approaches and analysis for these two stages will provide guidance for the (3) system design stage. This CAREER project includes a strong educational component for undergraduate students to participate in a number of competition projects to gain research experiences. These projects are also joined by graduate students to learn to convey research outcome to a general audience. Such an integrated research and educational effort aims at bridging the gaps between state-of-the-art research and the teaching of engineering approaches, many distinct knowledge bodies of EE, CE, and CS, and between systems research and device research in the academic community.