CAREER: Channel Coding Paradigms for Next-Generation Storage Systems

我们现在正处于一场海量数据生成和处理的技术革命中。同样需要海量的数据存储来支持这股技术热潮。必须发明新的解决方案，认识到存储系统的操作限制，以遏制数据存储成本的飙升。所有存储技术的基本共同点是信道编码方案。编码理论的结果已经在存储系统中得到了显著的成功。实用的编码方案帮助计算机存储变得无处不在。然而，目前可用的编码方案遇到了性能障碍：现有编码是为简单信道设计的，与新存储技术的需求不匹配，新存储技术必须在日益不利的介质上尽可能密集地打包数据。这种性能配置不仅违反了基本的信息论定律，而且直接增加了存储系统的成本。本研究从根本上重新思考了信道编码方法在存储系统中的应用。该项目创建了一个编码理论基础，可以拥抱而不是忽略不利的物理和操作条件，以增加即将到来的存储技术的容量。在四个研究方向上探索和利用了非二进制信道码的丰富的组合结构：(A)结构化非二进制低密度奇偶校验码的分析和设计，(B)非二进制非对称纠错码的理论和实践，(C)克服同步错误的非二进制方法，以及(D)基于理论的快速代码原型设计，使用用于快速仿真、FPGA实现和公开可用的在线评估工具的新算法。这一研究项目通过高中、本科生和研究生的积极和精心定制的研究活动，为发展一支有竞争力的美国劳动力做出了贡献。

We are now in the midst of a technological revolution of massive data generation and processing. Equally massive data storage is required to support this technological boom. New solutions cognizant of operational constraints of storage systems must be invented to curb the skyrocketing cost of data storage. Fundamentally common to all storage technologies are channel coding schemes. Results from coding theory have been used with phenomenal success in storage systems. Practical coding schemes have helped make computer storage ubiquitous. However, currently available coding schemes have hit a performance wall: existing codes are designed for simple channels, and do not match the needs of new storage technologies where the data must be packed as densely as possible on increasingly adverse mediums. Such performance provisioning not only violates fundamental information-theoretic laws but directly increases the cost of a storage system.This research fundamentally rethinks channel coding methods with applications to storage systems. This project creates a coding-theoretic foundation that embraces, rather than ignores, adverse physical and operating conditions to increase the capacity of the upcoming storage technologies. Rich combinatorial structure of non-binary channel codes is explored and exploited over four research thrusts: (a) analysis and design of structured non-binary low-density parity-check codes, (b) theory and practice of non-binary non-symmetric error correcting codes, (c) non-binary methodologies for overcoming synchronization errors, and (d) theory-based rapid code prototyping using novel algorithms for fast simulation, FPGA implementation, and publicly available on-line evaluation tool. This research project contributes to the development of a competitive American workforce through active and carefully tailored research engagement of high-school, undergraduate and graduate students.