SHF: CSR: Medium: Collaborative Research: Hierarchical On-Chip Millimeter-Wave Wireless Micro-Networks for Multi-Core Systems

具有数百个嵌入式功能块的多核处理器旨在为各种应用（如图形、金融和科学建模、网络、多媒体和无线基础设施）实现前所未有的性能优势。片上网络（NoC）是一种在单个芯片上集成多个嵌入式内核的方法。然而，随着集成水平的提高，由于传统的基于金属/介质的互连，传统的noc在片上数据传输中存在高延迟和能量损耗。无线NoC （WiNoC）通过用高带宽单跳远程无线信道取代多跳有线链路，同时解决了传统NoC的延迟、功耗和互连路由问题。最近的研究表明，硅集成片上天线在50-110 GHz的毫米波范围内工作，这是一项可行的技术。再加上毫米波收发器设计的重大进步，这一发展为设计高带宽和低功耗的winoc开辟了新的研究机会。本研究将发展片上无线微网路的跨层设计方法。将为WiNoC开发合适的物理层、数据链路层和网络层协议。这项工作的预期贡献是宽带和可积毫米波winoc的开发和演示。该提案的变革之处在于从一个全新的角度解决片上互连问题，即在微/纳米尺度上开发宽带毫米波无线网络，而不是追求传统有线互连的渐进式改进。通过将无线网络引入片上环境，提出的研究将引入多核芯片设计的范式转变。建议的研究将使本科生和研究生能够将课堂知识应用于需要硬件、软件和理论专业知识的研究问题，从而促进对他们的教育。这些专业知识将在大学和工业实验室环境中使用最先进的测试设备和计算设施进行开发，最终将成为保持美国技术领先地位所必需的。来自各种代表性不足群体的学生，包括妇女、非洲裔美国人和西班牙裔美国人，将参与这个项目。该项目的教育影响将与预期的研究成果对整个社会的积极影响相辅相成。

Multi-core processors with hundreds of embedded functional blocks are designed to achieve unprecedented performance benefits for a wide variety of applications such as graphics, financial and scientific modeling, networking, multimedia and wireless infrastructure. The Network-on-Chip (NoC) is an enabling methodology to integrate many embedded cores on a single die. However, with growing levels of integration traditional NoCs suffer from high latency and energy dissipation in on-chip data transfer due to conventional metal/dielectric based interconnects. The wireless NoC (WiNoC) simultaneously addresses the latency, power consumption and interconnect routing problems of conventional NoCs by replacing multi-hop wired links with high-bandwidth single-hop long-range wireless channels. Recent investigations have characterized silicon integrated on-chip antennas operating in the millimeter (mm)-wave range of 50-110 GHz, and this is now a viable technology. Coupled with significant advances in mm-wave transceiver design, this development opens up new research opportunities for designing high bandwidth and low power WiNoCs.The proposed research will develop a cross-layer design methodology for an on-chip wireless micro-network. Suitable physical, data link and network layer protocols will be developed for the WiNoC. The expected contribution of this work is the development and demonstration of broadband and integrable mm-wave WiNoCs. The transformational aspect of this proposal lies in addressing the on-chip interconnect problem from a fundamentally new perspective, namely by developing a broadband millimeter wave wireless network at the micro/nanoscale, as opposed to pursuing incremental improvements in traditional wired interconnects. By bringing wireless networking to the on-chip environment, the proposed research will introduce a paradigm shift in the design of multi-core chips. The proposed research will facilitate the education of undergraduate and graduate students by allowing them to apply classroom knowledge to a research problem requiring hardware, software and theoretical expertise. Such expertise will be developed in both university and industrial laboratory settings using state-of-the-art test equipment and computing facilities, and will ultimately be necessary to maintain the technological leadership of the United States. Students from various underrepresented groups, including women, African Americans and Hispanics, will be engaged in this project. The project's educational impacts will be complemented by the positive effect that the research outcomes are expected to have on society as a whole.