SBIR Phase I: High-Performance Analog-to-Digital Conversion for Broadband Applications

小型企业创新研究(SBIR)第一阶段项目的更广泛影响/商业潜力将是实现最适合消费产品的高性能模数转换器(ADC)，如多标准数字电视(到2015年市场价值为7亿美元)或专业仪器设备，如中端示波器(到2019年市场价值为18亿美元)。开发的技术和设计专业知识可以进一步用于其他各种ADC市场，包括基站、硬盘驱动器和移动和无线网络芯片组。拟议的宽带模数转换技术提供了影响整个社会的电子技术进步，包括消费电子和科学进步所需的高端仪器。这个小型企业创新研究第一阶段项目旨在开发用于宽带数字化的高性能模数转换器(ADC)。集成电路中数字计算技术的基本优势使复杂的片上系统(SoCS)成为可能。这些SoC极大地降低了现代电子产品的尺寸和功耗。将强大的数字内核连接到真实的模拟世界的需求对接口中所需的模拟前处理提出了关键的性能要求，特别是在ADC上。随着以数字为导向的CMOS扩展继续朝着更低的电源电压和更密集、更快的开关器件发展，传统的模拟设计技术无法达到几代技术所希望的性能。这使得实现高性能和高能效的ADC变得非常具有挑战性。该项目提出了ADC架构，该架构利用了纳米级数字CMOS技术中模拟/混合信号电路和ADC的独特设计范例。建议的ADC独一无二地利用晶体管的操作来克服与传统电压型模拟电路设计相关的挑战。预计拟议的技术创新将结合高性能和低功耗，并具有CMOS技术提供的成本优势。

The broader impacts/commercial potential of this Small Business Innovation Research (SBIR) Phase I project will be to enable high-performance analog-to-digital converters (ADCs) that are most ideally suited for consumer products like multi-standard digital TVs ($0.7 billion market by 2015) or professional instrumentation like the mid-range oscilloscopes ($1.8 billion market by 2019). The developed technology and design expertise can further be used in a wide variety of other ADC markets including base stations, hard-disk drives and mobile & WiFi chipsets. The proposed broadband analog-to-digital-conversion technology provides technological advances in electronics that impact the society at large including consumer electronics and high-end instrumentation needed for scientific progress.This Small Business Innovation Research Phase I project aims to develop high performance analog-to-digital converters (ADCs) for wideband digitization. Fundamental advantages of digital computation techniques in integrated circuits have made possible complex systems-on-chip (SoCs). These SoCs drastically reduce the size and power consumed in modern electronics. The need to interface powerful digital cores to the real, analog world places critical performance requirements on the analog-pre-processing required in the interfaces, specifically on ADCs. As digital-oriented CMOS scaling continues towards lower supply voltages and denser and faster switching devices, traditional analog design techniques lack the desired performance by several technology generations. This has made implementing high-performance and power-efficient ADCs very challenging. This project proposes ADC architectures that leverage a unique design paradigm for analog/mixed-signal circuits and ADCs in nanoscale digital CMOS technologies. The proposed ADCs uniquely exploit the operation of transistors to overcome challenges associated with the design of traditional voltage-mode analog circuits. The proposed technological innovations are expected to bring together high performance and low power and with the cost-advantage offered by CMOS technologies.