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I-Corps: Dense Flexible Interconnects for Advanced Testing and Integration

I-Corps: Dense Flexible Interconnects for Advanced Testing and Integration
I-Corps:用于高级测试和集成的密集灵活互连
批准号:
1620062
负责人:
Muhannad Bakir
金额:
$5.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2016
资助国家:
美国
项目状态:
已结题
起止时间:
2016-02-01 至 2016-12-31

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中文摘要
翻译
随着器件尺寸的不断减小已经开始接近物理极限,对于将多个芯片集成和/或堆叠到同一平台上的需求不断增长。然而,多个芯片的这种集成不仅加剧了制造、制造和组装,而且降低了最终产品的产量;这增加了在制造过程的各个阶段引起故障的可能性。因此,广泛测试的作用,以过滤出任何有缺陷或损坏的芯片,为新兴的下一代芯片变得越来越重要。然而,复杂的下一代芯片的测试带来了许多挑战。首先,随着待测结构尺寸的减小,它们在测试过程中越来越容易受到损伤。除此之外,相邻信号焊盘之间的距离正在减小,因此测试平台应该能够对应这种漂移。随着集成芯片复杂性的增加,测试过程中产生的热量迅速增加,给测试方法带来了进一步的挑战。因此,迫切需要一种新的平台,它可以减轻一些当前和未来可能的障碍,允许电子设计,测试和封装公司继续为后代进行设备和系统级扩展。随着现代电子产品的使用,从可穿戴设备和智能汽车到高性能计算和工业,不断挑战极限以获得更智能和更高效的电子产品的能力将产生深远的影响。拟议的测试平台是芯片测试的关键组件,应该能够克服前面提到的挑战。该团队已经成功地展示了内插器级别的微流体冷却,并将其性能与空气冷却系统进行了比较。同样,该团队对具有高平面外顺应性的机械柔性互连的设计、制造和表征进行了广泛的研究。提出的先进测试平台具有机械柔性互连和微流体冷却系统,通过在测试期间提供有效的热管理并允许以最小的损伤探测密集和较小的结构,有可能彻底改变下一代测试应用;这将允许降低测试成本同时防止测试期间的过热。然而,对拟议技术的评估和商业化准备情况的检查将通过该计划进行。此外,通过NSF I-Corps计划,该团队将与半导体和电子行业的各种商业实体进行访谈,以更好地了解当前和未来测试中可能存在的瓶颈,并研究如何最好地定位该领域的技术。随着集成IC成为大多数消费电子市场不可或缺的一部分,所提出的技术将有助于为公众提供越来越强大的设备。该技术还将减少在测试阶段期间损坏的芯片的数量,并且将允许更高的产量和更低的开销,允许制造商以具有竞争力的价格点操作,从而使消费者物有所值。
英文摘要
There is a growing need for the integration and/or stacking of multiple chips onto the same platform as the continual reduction of device size has begun to approach physical limits. However, such integration of multiple chips not only exacerbates fabrication, manufacturing, and assembly, but also lowers the yield of end products; this increases the possibility for failure to be induced at various stages of manufacturing processes. As a result, the role of extensive testing to filter any defective or damaged chips out for an emerging next generation chips is becoming increasingly significant. However, the testing of complex next generation chips poses a number of challenges. First, as size of the structures to be tested is reducing, they are more and more vulnerable to damage during testing. In addition to this, the distance between adjacent signal pads is reducing, and thus testing platforms should be able to correspond this drift. With the increasing complexity of integrated chips, the heat generated during testing is rapidly increasing adding further challenges to the testing methodology. Therefore, there is a critical need for a novel platform which can alleviate some current and possible future hurdles allowing electronic design, test and packaging companies to continue device and system level scaling for future generations. With the use of modern electronics spanning from wearables and smart cars to high performance computing and industries, the ability to keep pushing the envelope to get smarter and more efficient electronics would have far reaching effects.The proposed testing platform, is a critical component in the testing of chips and should be able to overcome the challenges mentioned earlier. This team has successfully demonstrated microfluidic cooling on interposer level and have benchmarked the performance compared to the air cooled system. Similarly, the team has carried out extensive research on design, fabrication, and characterization of mechanically flexible interconnects which have high out-of-plane compliance. The proposed advanced testing platform featuring mechanically flexible interconnects and microfluidic cooling system has the potential to revolutionize next generation testing applications by providing efficient thermal management during testing and allowing the probing of dense and smaller structures with minimal damage; this would allow test cost reduction while preventing overheating during test However, the assessment of the proposed technology and the inspection of the readiness for commercialization will be conducted through this program. Also, through the NSF I-Corps program, the team will conduct interviews with various commercial entities in the semiconductor and electronics industry to better understand possible current and future bottlenecks in testing and to investigate how to best position of technologies for this space. With integrated ICs being an integral part of majority of the consumer electronics market, the proposed technology will aid in providing more and more powerful devices to the general public. this technology will also reduce the number of chips damaged during the testing phase and will allow higher yields and lower overheads allowing manufacturers to operate at a competitive price point giving consumers good value for money.
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Heterogeneous Interconnect Stitching Technology (HIST) For High-Performance Computing Systems
  • 批准号:
    1810081
  • 项目类别:
    Standard Grant
  • 资助金额:
    $33.0万
  • 财政年份:
    2018
  • 负责人:
    Muhannad Bakir
  • 依托单位:
SHF:Medium:Collaborative Research: Electrical-thermal Co-Design of Microfluidically-Cooled 3D IC's
  • 批准号:
    1302297
  • 项目类别:
    Standard Grant
  • 资助金额:
    $46.0万
  • 财政年份:
    2013
  • 负责人:
    Muhannad Bakir
  • 依托单位:
Interconnect Networks for Three-Dimensional Gigascale System-on-a-Chip
  • 批准号:
    0701560
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $30.0万
  • 财政年份:
    2007
  • 负责人:
    Muhannad Bakir
  • 依托单位:
国内基金
海外基金
基于多模态融合Dense-Fusion深度学习网络预测原发性胃肠道间质瘤术后复发风险及靶向治疗获益性的研究
  • 批准号:
    --
  • 项目类别:
    面上项目
  • 资助金额:
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  • 批准年份:
    2022
  • 负责人:
    陈韬
  • 依托单位:
The formation and evolution of planetary systems in dense star clusters
  • 批准号:
    11043007
  • 项目类别:
    专项基金项目
  • 资助金额:
    10.0万元
  • 批准年份:
    2010
  • 负责人:
    柯文采
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