SBIR Phase I: Ultra Power-Efficient Analog and Bio-inspired Integrated Circuits for Wearable Computing

这个小型企业创新研究（SBIR）第一阶段项目的更广泛的影响/商业潜力是解决下一代可穿戴计算应用中的关键功率预算问题。候选应用程序需要超低功耗，需要大量的上下文感知计算，并需要在嘈杂的真实的世界中执行。 消费者的期望和使用传统电路技术可以实现的期望之间存在很大的差距。可重新配置和生物启发的分类器使用专有的混合信号方法，独特地缩小了可穿戴计算的功率/性能差距。 我们的第一阶段交付成果专注于完成最小可行产品（MVP），该产品将使用手势识别来唤醒/控制可穿戴设备的行为，其功耗预算在低微瓦范围内。 该演示将使用可编程神经分类器引擎对传感器刺激进行动作识别。这一重要步骤将使技术组合能够进一步发展，以适应更广泛的应用。拟议项目的核心创新在于嵌入式计算的混合信号方法，以打破传统数字系统的能源效率障碍。现场可编程模拟阵列（FPAA）方法结合了神经形态电路，其接近5GMAC/uW的处理效率以用于高级分类任务。长期愿景是通过一系列基于新颖可编程架构的混合信号集成电路解决广泛的终端应用，该架构的功耗比可比数字实现低2个数量级;提供世界上最节能的解决方案。当以前需要至少10 mW才能执行的分类任务可以在100 uW内完成时，广泛的应用成为可能。这种影响将在下一代便携式设备的设计中最为深刻地感受到-特别是无线传感器微粒中的复杂事件跟踪功能（实现物联网（IoT）），下一代可穿戴计算设备。

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is to solve critical power budget issues in next generation wearable computing applications. Candidate applications require ultra-low power, require massive context-awareness computation, and need to perform in the noisy real world. A large gap exists between consumer expectation and what can be realized using conventional circuit techniques. Reconfigurable and biologically inspired classifiers use proprietary mixed signal approaches that uniquely close wearable computing's power/performance gap. Our Phase I deliverables focus on completing a minimum viable product (MVP) that will use gesture recognition to wake up/control behavior of a wearable device with a power budget in the low micro-watt range. The demonstration would use programmable neural classifier engines acting on sensor stimulus to perform gesture recognition. This important step will allow the further development of the technology portfolio for a broader range of applications.The proposed project's central innovation lies in the mixed-signal approach to embedded computing to shatter the energy efficiency barrier of traditional digital systems. The Field Programmable Analog Array (FPAA) approach incorporates neuromorphic circuits which approach 5GMAC/uW processing efficiency for high-level classification tasks. The Long-term vision is to address a broad range of end applications through a family of mixed signal integrated circuits based on a novel and programmable architecture that operates at 2 orders of magnitude less power than a comparable digital implementation; to deliver solutions that are the world's most energy efficient implementation. When classification tasks which formerly required at least 10mW to perform can be accomplished within 100uW, a vast range of applications become possible. The impact will be most profoundly felt in the design of next generation portable devices- in particular complex event tracking functions in wireless sensor motes (enabling the Internet-of-Things (IoT)), next generation devices for wearable computing.